/external/llvm/test/MC/ARM/ |
D | thumb-neon-v8.s | 60 vrintz.f32 d12, d18 61 @ CHECK: vrintz.f32 d12, d18 @ encoding: [0xba,0xff,0xa2,0xc5] 62 vrintz.f32 q9, q4 63 @ CHECK: vrintz.f32 q9, q4 @ encoding: [0xfa,0xff,0xc8,0x25] 80 vrintz.f32.f32 q9, q4 81 @ CHECK: vrintz.f32 q9, q4 @ encoding: [0xfa,0xff,0xc8,0x25]
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D | neon-v8.s | 60 vrintz.f32 d12, d18 61 @ CHECK: vrintz.f32 d12, d18 @ encoding: [0xa2,0xc5,0xba,0xf3] 62 vrintz.f32 q9, q4 63 @ CHECK: vrintz.f32 q9, q4 @ encoding: [0xc8,0x25,0xfa,0xf3] 80 vrintz.f32.f32 q9, q4 81 @ CHECK: vrintz.f32 q9, q4 @ encoding: [0xc8,0x25,0xfa,0xf3]
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D | directive-arch_extension-simd.s | 62 vrintz.f32 s0, s1 64 vrintz.f64 d0, d1 66 vrintz.f32.f32 s0, s0 68 vrintz.f64.f64 d0, d0 170 vrintz.f32 s0, s1 172 vrintz.f64 d0, d1 174 vrintz.f32.f32 s0, s0 176 vrintz.f64.f64 d0, d0
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D | directive-arch_extension-fp.s | 90 vrintz.f32 s0, s1 92 vrintz.f64 d0, d1 94 vrintz.f32.f32 s0, s0 96 vrintz.f64.f64 d0, d0 226 vrintz.f32 s0, s1 228 vrintz.f64 d0, d1 230 vrintz.f32.f32 s0, s0 232 vrintz.f64.f64 d0, d0
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D | fullfp16-neon.s | 399 vrintz.f16.f16 d0, d1 400 vrintz.f16.f16 q0, q1 401 @ ARM: vrintz.f16 d0, d1 @ encoding: [0x81,0x05,0xb6,0xf3] 402 @ ARM: vrintz.f16 q0, q1 @ encoding: [0xc2,0x05,0xb6,0xf3] 403 @ THUMB: vrintz.f16 d0, d1 @ encoding: [0xb6,0xff,0x81,0x05] 404 @ THUMB: vrintz.f16 q0, q1 @ encoding: [0xb6,0xff,0xc2,0x05]
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D | thumb-fp-armv8.s | 99 vrintz.f32 s3, s24 100 @ CHECK: vrintz.f32 s3, s24 @ encoding: [0xf6,0xee,0xcc,0x1a]
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D | fp-armv8.s | 96 vrintz.f32 s3, s24 97 @ CHECK: vrintz.f32 s3, s24 @ encoding: [0xcc,0x1a,0xf6,0xee]
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D | invalid-neon-v8.s | 23 vrintz.f32 d3, q12
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D | fullfp16-neon-neg.s | 286 vrintz.f16.f16 d0, d1 287 vrintz.f16.f16 q0, q1
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D | diagnostics.s | 469 vrintz.f32.f32 s0, s1 472 vrintz.f64 d10, d9
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/external/llvm/test/MC/Disassembler/ARM/ |
D | neon-v8.txt | 61 # CHECK: vrintz.f32 d12, d18 63 # CHECK: vrintz.f32 q9, q4
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D | thumb-neon-v8.txt | 61 # CHECK: vrintz.f32 d12, d18 63 # CHECK: vrintz.f32 q9, q4
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D | fullfp16-neon-thumb.txt | 263 # CHECK: vrintz.f16 d0, d1 264 # CHECK: vrintz.f16 q0, q1
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D | fullfp16-neon-arm.txt | 263 # CHECK: vrintz.f16 d0, d1 264 # CHECK: vrintz.f16 q0, q1
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D | fp-armv8.txt | 119 # CHECK: vrintz.f32 s3, s24
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D | thumb-fp-armv8.txt | 124 # CHECK: vrintz.f32 s3, s24
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/external/llvm/test/CodeGen/ARM/ |
D | arm32-rounding.ll | 57 ; CHECK: vrintz.f32 66 ; DP: vrintz.f64
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/external/v8/test/cctest/ |
D | test-disasm-arm.cc | 774 COMPARE(vrintz(d0, d0), "eeb60bc0 vrintz.f64.f64 d0, d0"); in TEST() 775 COMPARE(vrintz(d2, d3, ne), "1eb62bc3 vrintzne.f64.f64 d2, d3"); in TEST()
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D | test-assembler-arm.cc | 1946 __ vrintz(s5, s6); in TEST() local 2051 __ vrintz(d5, d6); in TEST() local
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/external/llvm/test/CodeGen/Thumb2/ |
D | float-intrinsics-float.ll | 156 ; FP-ARMv8: vrintz.f32
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D | float-intrinsics-double.ll | 162 ; FP-ARMv8: vrintz.f64
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/external/v8/src/arm/ |
D | assembler-arm.h | 1222 void vrintz(const SwVfpRegister dst, const SwVfpRegister src, 1224 void vrintz(const DwVfpRegister dst, const DwVfpRegister src,
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D | assembler-arm.cc | 3472 void Assembler::vrintz(const SwVfpRegister dst, const SwVfpRegister src, in vrintz() function in v8::internal::Assembler 3486 void Assembler::vrintz(const DwVfpRegister dst, const DwVfpRegister src, in vrintz() function in v8::internal::Assembler
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/external/v8/src/compiler/arm/ |
D | code-generator-arm.cc | 810 __ vrintz(i.OutputFloat32Register(), i.InputFloat32Register(0)); in AssembleArchInstruction() local 813 __ vrintz(i.OutputFloat64Register(), i.InputFloat64Register(0)); in AssembleArchInstruction() local
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