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Searched refs:vsl (Results 1 – 21 of 21) sorted by relevance

/external/clang/test/CodeGen/
Dbuiltins-systemz-zvector-error.c11 volatile vector signed long long vsl; variable
70 vsl = vec_permi(vsl, vsl, idx); // expected-error {{no matching function}} in test_core()
73 vsl = vec_permi(vsl, vsl, -1); // expected-error {{no matching function}} in test_core()
76 vsl = vec_permi(vsl, vsl, 4); // expected-error {{no matching function}} in test_core()
134 vsl = vec_gather_element(vsl, vul, cptrsl, idx); // expected-error {{no matching function}} in test_core()
137 vsl = vec_gather_element(vsl, vul, cptrsl, -1); // expected-error {{no matching function}} in test_core()
140 vsl = vec_gather_element(vsl, vul, cptrsl, 2); // expected-error {{no matching function}} in test_core()
198 vec_scatter_element(vsl, vul, ptrsl, idx); // expected-error {{no matching function}} in test_core()
201 vec_scatter_element(vsl, vul, ptrsl, -1); // expected-error {{no matching function}} in test_core()
204 vec_scatter_element(vsl, vul, ptrsl, 2); // expected-error {{no matching function}} in test_core()
[all …]
Dbuiltins-systemz-zvector.c11 volatile vector signed long long vsl; variable
94 sl = vec_extract(vsl, idx); in test_core()
121 vsl = vec_insert(sl, vsl, idx); in test_core()
142 vsl = vec_promote(sl, idx); in test_core()
161 vsl = vec_insert_and_zero(cptrsl); in test_core()
186 vsl = vec_perm(vsl, vsl, vuc); in test_core()
195 vsl = vec_permi(vsl, vsl, 0); in test_core()
197 vsl = vec_permi(vsl, vsl, 1); in test_core()
199 vsl = vec_permi(vsl, vsl, 2); in test_core()
201 vsl = vec_permi(vsl, vsl, 3); in test_core()
[all …]
Dbuiltins-systemz-vector.c18 volatile vec_slong vsl; variable
70 vsi = __builtin_s390_vpksg(vsl, vsl); in test_core()
77 vsi = __builtin_s390_vpksgs(vsl, vsl, &cc); in test_core()
87 vsl = __builtin_s390_vuphf(vsi); in test_core()
94 vsl = __builtin_s390_vuplf(vsi); in test_core()
137 vsl = __builtin_s390_vavgg(vsl, vsl); in test_integer()
240 vsl = __builtin_s390_vmaef(vsi, vsi, vsl); in test_integer()
253 vsl = __builtin_s390_vmaof(vsi, vsi, vsl); in test_integer()
279 vsl = __builtin_s390_vmef(vsi, vsi); in test_integer()
292 vsl = __builtin_s390_vmof(vsi, vsi); in test_integer()
[all …]
Dbuiltins-systemz-vector-error.c18 volatile vec_slong vsl; variable
/external/libexif/libexif/fuji/
Dmnote-fuji-entry.c194 ExifSLong vsl; in mnote_fuji_entry_get_value() local
281 vsl = exif_get_slong (entry->data, entry->order); in mnote_fuji_entry_get_value()
282 snprintf (val, maxlen, "%li", (long int) vsl); in mnote_fuji_entry_get_value()
/external/valgrind/none/tests/ppc32/
Djm-vmx.stdout.exp_Minus_nan1153 vsl: 0102030405060708090a0b0c0e0d0e0f, 00000000000000000000000000000000
1154 vsl: => 01020304 05060708 090a0b0c 0e0d0e0f (00000000)
1155 vsl: 0102030405060708090a0b0c0e0d0e0f, 01010101010101010101010101010101
1156 vsl: => 02040608 0a0c0e10 12141618 1c1a1c1e (00000000)
1157 vsl: 0102030405060708090a0b0c0e0d0e0f, 02020202020202020202020202020202
1158 vsl: => 04080c10 14181c20 24282c30 3834383c (00000000)
1159 vsl: 0102030405060708090a0b0c0e0d0e0f, 03030303030303030303030303030303
1160 vsl: => 08101820 28303840 48505860 70687078 (00000000)
1161 vsl: 0102030405060708090a0b0c0e0d0e0f, 04040404040404040404040404040404
1162 vsl: => 10203040 50607080 90a0b0c0 e0d0e0f0 (00000000)
[all …]
/external/valgrind/none/tests/ppc64/
Djm-vmx.stdout.exp-LE1153 vsl: 0102030405060708090a0b0c0e0d0e0f, 00000000000000000000000000000000
1154 vsl: => 01020304 05060708 090a0b0c 0e0d0e0f (00000000)
1155 vsl: 0102030405060708090a0b0c0e0d0e0f, 01010101010101010101010101010101
1156 vsl: => 02040608 0a0c0e10 12141618 1c1a1c1e (00000000)
1157 vsl: 0102030405060708090a0b0c0e0d0e0f, 02020202020202020202020202020202
1158 vsl: => 04080c10 14181c20 24282c30 3834383c (00000000)
1159 vsl: 0102030405060708090a0b0c0e0d0e0f, 03030303030303030303030303030303
1160 vsl: => 08101820 28303840 48505860 70687078 (00000000)
1161 vsl: 0102030405060708090a0b0c0e0d0e0f, 04040404040404040404040404040404
1162 vsl: => 10203040 50607080 90a0b0c0 e0d0e0f0 (00000000)
[all …]
Djm-vmx.stdout.exp_Minus_nan1153 vsl: 0102030405060708090a0b0c0e0d0e0f, 00000000000000000000000000000000
1154 vsl: => 01020304 05060708 090a0b0c 0e0d0e0f (00000000)
1155 vsl: 0102030405060708090a0b0c0e0d0e0f, 01010101010101010101010101010101
1156 vsl: => 02040608 0a0c0e10 12141618 1c1a1c1e (00000000)
1157 vsl: 0102030405060708090a0b0c0e0d0e0f, 02020202020202020202020202020202
1158 vsl: => 04080c10 14181c20 24282c30 3834383c (00000000)
1159 vsl: 0102030405060708090a0b0c0e0d0e0f, 03030303030303030303030303030303
1160 vsl: => 08101820 28303840 48505860 70687078 (00000000)
1161 vsl: 0102030405060708090a0b0c0e0d0e0f, 04040404040404040404040404040404
1162 vsl: => 10203040 50607080 90a0b0c0 e0d0e0f0 (00000000)
[all …]
/external/llvm/test/CodeGen/PowerPC/
Dp8-scalar_vector_conversions.ll1265 define i64 @getsl0(<2 x i64> %vsl) {
1267 %vsl.addr = alloca <2 x i64>, align 16
1268 store <2 x i64> %vsl, <2 x i64>* %vsl.addr, align 16
1269 %0 = load <2 x i64>, <2 x i64>* %vsl.addr, align 16
1280 define i64 @getsl1(<2 x i64> %vsl) {
1282 %vsl.addr = alloca <2 x i64>, align 16
1283 store <2 x i64> %vsl, <2 x i64>* %vsl.addr, align 16
1284 %0 = load <2 x i64>, <2 x i64>* %vsl.addr, align 16
1325 define i64 @getvelsl(<2 x i64> %vsl, i32 signext %i) {
1327 %vsl.addr = alloca <2 x i64>, align 16
[all …]
/external/llvm/test/MC/PowerPC/
Dppc64-encoding-vmx.s195 # CHECK-BE: vsl 2, 3, 4 # encoding: [0x10,0x43,0x21,0xc4]
196 # CHECK-LE: vsl 2, 3, 4 # encoding: [0xc4,0x21,0x43,0x10]
197 vsl 2, 3, 4
/external/llvm/include/llvm/IR/
DIntrinsicsSystemZ.td306 def int_s390_vsl : SystemZBinary<"vsl", llvm_v16i8_ty>;
DIntrinsicsPowerPC.td574 def int_ppc_altivec_vsl : PowerPC_Vec_WWW_Intrinsic<"vsl">;
/external/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-vmx.txt168 # CHECK: vsl 2, 3, 4
/external/llvm/test/MC/SystemZ/
Dinsn-good-z13.s4083 #CHECK: vsl %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0x74]
4084 #CHECK: vsl %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0x74]
4085 #CHECK: vsl %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0x74]
4086 #CHECK: vsl %v31, %v0, %v0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0x74]
4087 #CHECK: vsl %v18, %v3, %v20 # encoding: [0xe7,0x23,0x40,0x00,0x0a,0x74]
4089 vsl %v0, %v0, %v0
4090 vsl %v0, %v0, %v31
4091 vsl %v0, %v31, %v0
4092 vsl %v31, %v0, %v0
4093 vsl %v18, %v3, %v20
Dinsn-bad-zEC12.s1289 #CHECK: vsl %v0, %v0, %v0
1291 vsl %v0, %v0, %v0
/external/llvm/test/MC/Disassembler/SystemZ/
Dinsns-z13.txt2705 #CHECK: vsl %v0, %v0, %v0
2708 #CHECK: vsl %v18, %v3, %v20
2711 #CHECK: vsl %v31, %v31, %v31
/external/llvm/test/CodeGen/SystemZ/
Dvec-intrinsics.ll108 declare <16 x i8> @llvm.s390.vsl(<16 x i8>, <16 x i8>)
1495 ; CHECK: vsl %v24, %v24, %v26
1497 %res = call <16 x i8> @llvm.s390.vsl(<16 x i8> %a, <16 x i8> %b)
/external/webrtc/talk/media/testdata/
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/external/llvm/lib/Target/SystemZ/
DSystemZInstrVector.td588 def VSL : BinaryVRRc<"vsl", 0xE774, int_s390_vsl, v128b, v128b>;
/external/llvm/lib/Target/PowerPC/
DPPCInstrAltivec.td690 def VSL : VX1_Int_Ty< 452, "vsl" , int_ppc_altivec_vsl, v4i32 >;
/external/icu/icu4c/source/data/misc/
DsupplementalData.txt6533 "vsl",