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/external/valgrind/VEX/priv/
Dhost_generic_simd128.c186 res->w16[0] = max16U(argL->w16[0], argR->w16[0]); in h_generic_calc_Max16Ux8()
187 res->w16[1] = max16U(argL->w16[1], argR->w16[1]); in h_generic_calc_Max16Ux8()
188 res->w16[2] = max16U(argL->w16[2], argR->w16[2]); in h_generic_calc_Max16Ux8()
189 res->w16[3] = max16U(argL->w16[3], argR->w16[3]); in h_generic_calc_Max16Ux8()
190 res->w16[4] = max16U(argL->w16[4], argR->w16[4]); in h_generic_calc_Max16Ux8()
191 res->w16[5] = max16U(argL->w16[5], argR->w16[5]); in h_generic_calc_Max16Ux8()
192 res->w16[6] = max16U(argL->w16[6], argR->w16[6]); in h_generic_calc_Max16Ux8()
193 res->w16[7] = max16U(argL->w16[7], argR->w16[7]); in h_generic_calc_Max16Ux8()
200 res->w16[0] = min16U(argL->w16[0], argR->w16[0]); in h_generic_calc_Min16Ux8()
201 res->w16[1] = min16U(argL->w16[1], argR->w16[1]); in h_generic_calc_Min16Ux8()
[all …]
/external/boringssl/linux-aarch64/crypto/sha/
Dsha256-armv8.S14 ldr w16,[x16]
15 tst w16,#ARMV8_SHA256
43 ror w16,w24,#6
51 eor w16,w16,w6,ror#11 // Sigma1(e)
55 add w27,w27,w16 // h+=Sigma1(e)
68 ror w16,w23,#6
76 eor w16,w16,w7,ror#11 // Sigma1(e)
80 add w26,w26,w16 // h+=Sigma1(e)
92 ror w16,w22,#6
100 eor w16,w16,w8,ror#11 // Sigma1(e)
[all …]
Dsha1-armv8.S14 ldr w16,[x16]
15 tst w16,#ARMV8_SHA1
201 add w21,w21,w16 // future e+=X[i]
226 eor w3,w3,w16
289 eor w8,w8,w16
358 eor w14,w14,w16
382 eor w16,w16,w19
386 eor w16,w16,w8
390 eor w16,w16,w13
393 ror w16,w16,#31
[all …]
/external/llvm/test/MC/Mips/msa/
Dtest_3rf.s7 # CHECK: fceq.w $w1, $w23, $w16 # encoding: [0x78,0x90,0xb8,0x5a]
8 # CHECK: fceq.d $w0, $w8, $w16 # encoding: [0x78,0xb0,0x40,0x1a]
9 # CHECK: fcle.w $w16, $w9, $w24 # encoding: [0x79,0x98,0x4c,0x1a]
26 # CHECK: fcune.d $w16, $w26, $w21 # encoding: [0x78,0xb5,0xd4,0x1c]
29 # CHECK: fexdo.h $w8, $w0, $w16 # encoding: [0x7a,0x10,0x02,0x1b]
37 # CHECK: fmax_a.w $w10, $w16, $w10 # encoding: [0x7b,0xca,0x82,0x9b]
44 # CHECK: fmsub.d $w8, $w18, $w16 # encoding: [0x79,0x70,0x92,0x1b]
54 # CHECK: fslt.d $w16, $w26, $w21 # encoding: [0x7b,0x35,0xd4,0x1a]
61 # CHECK: fsueq.w $w16, $w24, $w25 # encoding: [0x7a,0xd9,0xc4,0x1a]
69 # CHECK: fsune.w $w16, $w31, $w2 # encoding: [0x7a,0x82,0xfc,0x1c]
[all …]
Dtest_3r.s13 # CHECK: adds_s.w $w16, $w14, $w13 # encoding: [0x79,0x4d,0x74,0x10]
23 # CHECK: asub_s.b $w23, $w16, $w3 # encoding: [0x7a,0x03,0x85,0xd1]
32 # CHECK: ave_s.h $w16, $w19, $w9 # encoding: [0x7a,0x29,0x9c,0x10]
35 # CHECK: ave_u.b $w16, $w19, $w9 # encoding: [0x7a,0x89,0x9c,0x10]
39 # CHECK: aver_s.b $w26, $w16, $w2 # encoding: [0x7b,0x02,0x86,0x90]
48 # CHECK: bclr.h $w16, $w21, $w28 # encoding: [0x79,0xbc,0xac,0x0d]
51 # CHECK: binsl.b $w5, $w16, $w24 # encoding: [0x7b,0x18,0x81,0x4d]
60 # CHECK: bneg.h $w28, $w16, $w4 # encoding: [0x7a,0xa4,0x87,0x0d]
81 # CHECK: clt_s.w $w23, $w8, $w16 # encoding: [0x79,0x50,0x45,0xcf]
84 # CHECK: clt_u.h $w16, $w31, $w23 # encoding: [0x79,0xb7,0xfc,0x0f]
[all …]
Dset-msa-directive.s7 # CHECK: addvi.d $w16, $w19, 7
11 # CHECK: subvi.d $w16, $w19, 7
17 addvi.d $w16, $w19, 7
22 subvi.d $w16, $w19, 7
Dtest_i5.s6 # CHECK: addvi.d $w16, $w1, 21 # encoding: [0x78,0x75,0x0c,0x06]
11 # CHECK: clei_s.b $w12, $w16, 1 # encoding: [0x7a,0x01,0x83,0x07]
46 # CHECK: subvi.d $w19, $w16, 7 # encoding: [0x78,0xe7,0x84,0xc6]
51 addvi.d $w16, $w1, 21
56 clei_s.b $w12, $w16, 1
91 subvi.d $w19, $w16, 7
Dtest_i8.s12 # CHECK: xori.b $w16, $w10, 20 # encoding: [0x7b,0x14,0x54,0x00]
23 xori.b $w16, $w10, 20
Dtest_2r.s5 # CHECK: fill.w $w16, $24 # encoding: [0x7b,0x02,0xc4,0x1e]
21 fill.w $w16, $24
Dtest_mi10.s22 # CHECK: ld.d $w16, -1024($17) # encoding: [0x7b,0x80,0x8c,0x23]
49 ld.d $w16, -1024($17)
Dtest_2rf.s12 # CHECK: ffint_u.d $w19, $w16 # encoding: [0x7b,0x3f,0x84,0xde]
45 ffint_u.d $w19, $w16
Dtest_bit.s30 # CHECK: sat_u.d $w29, $w16, 5 # encoding: [0x78,0x85,0x87,0x4a]
79 sat_u.d $w29, $w16, 5
/external/llvm/test/MC/Disassembler/Mips/msa/
Dtest_3rf.txt7 0x78 0x90 0xb8 0x5a # CHECK: fceq.w $w1, $w23, $w16
8 0x78 0xb0 0x40 0x1a # CHECK: fceq.d $w0, $w8, $w16
9 0x79 0x98 0x4c 0x1a # CHECK: fcle.w $w16, $w9, $w24
26 0x78 0xb5 0xd4 0x1c # CHECK: fcune.d $w16, $w26, $w21
29 0x7a 0x10 0x02 0x1b # CHECK: fexdo.h $w8, $w0, $w16
37 0x7b 0xca 0x82 0x9b # CHECK: fmax_a.w $w10, $w16, $w10
44 0x79 0x70 0x92 0x1b # CHECK: fmsub.d $w8, $w18, $w16
54 0x7b 0x35 0xd4 0x1a # CHECK: fslt.d $w16, $w26, $w21
61 0x7a 0xd9 0xc4 0x1a # CHECK: fsueq.w $w16, $w24, $w25
69 0x7a 0x82 0xfc 0x1c # CHECK: fsune.w $w16, $w31, $w2
[all …]
Dtest_3r.txt13 0x79 0x4d 0x74 0x10 # CHECK: adds_s.w $w16, $w14, $w13
23 0x7a 0x03 0x85 0xd1 # CHECK: asub_s.b $w23, $w16, $w3
32 0x7a 0x29 0x9c 0x10 # CHECK: ave_s.h $w16, $w19, $w9
35 0x7a 0x89 0x9c 0x10 # CHECK: ave_u.b $w16, $w19, $w9
39 0x7b 0x02 0x86 0x90 # CHECK: aver_s.b $w26, $w16, $w2
48 0x79 0xbc 0xac 0x0d # CHECK: bclr.h $w16, $w21, $w28
51 0x7b 0x18 0x81 0x4d # CHECK: binsl.b $w5, $w16, $w24
60 0x7a 0xa4 0x87 0x0d # CHECK: bneg.h $w28, $w16, $w4
81 0x79 0x50 0x45 0xcf # CHECK: clt_s.w $w23, $w8, $w16
84 0x79 0xb7 0xfc 0x0f # CHECK: clt_u.h $w16, $w31, $w23
[all …]
Dtest_i5.txt6 0x78 0x75 0x0c 0x06 # CHECK: addvi.d $w16, $w1, 21
11 0x7a 0x01 0x83 0x07 # CHECK: clei_s.b $w12, $w16, 1
46 0x78 0xe7 0x84 0xc6 # CHECK: subvi.d $w19, $w16, 7
Dtest_i8.txt12 0x7b 0x14 0x54 0x00 # CHECK: xori.b $w16, $w10, 20
/external/dng_sdk/source/
Ddng_resample.cpp261 int16 *w16 = fWeights16->Buffer_int16 () + fWeightStep * sample; in Initialize() local
268 w16 [j] = (int16) Round_int32 (w32 [j] * 16384.0); in Initialize()
270 t16 += w16 [j]; in Initialize()
277 w16 [fRadius - (fract >= 0.5 ? 0 : 1)] += (int16) (16384 - t16); in Initialize()
450 int16 *w16 = (int16 *) Weights16 (dng_point ((int32) y, in Initialize() local
458 w16 [j] = (int16) Round_int32 (w32 [j] * 16384.0); in Initialize()
460 t16 += w16 [j]; in Initialize()
471 w16 [centerOffset] += (int16) (16384 - t16); in Initialize()
/external/valgrind/VEX/pub/
Dlibvex_basictypes.h78 UShort w16[8]; member
88 UShort w16[16]; member
/external/llvm/test/MC/Mips/mips32r2/
Dinvalid-msa.s19 …ffint_s.w $w16,$w14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
29 …flog2.d $w12,$w16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
49 …nloc.d $w16,$w7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
51 …nloc.w $w17,$w16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
59 …pcnt.d $w5,$w16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
/external/llvm/test/MC/AArch64/
Darm64-tls-relocs.s96 movk w16, #:tprel_g0_nc:var
220 movk w16, #:dtprel_g0_nc:var
Dtls-relocs.s81 movk w16, #:dtprel_g0_nc:var
283 movk w16, #:tprel_g0_nc:var
Darm64-basic-a64-instructions.s10 crc32cx w18, w16, xzr
Darm64-leaf-compact-unwind.s147 ldr w16, [x8]
164 add w9, w9, w16
/external/llvm/test/MC/Disassembler/AArch64/
Darm64-crc32.txt10 # CHECK: crc32cx w18, w16, xzr
/external/v8/test/cctest/
Dtest-disasm-arm64.cc394 COMPARE(adds(w15, w16, Operand(w17, SXTB, 4)), "adds w15, w16, w17, sxtb #4"); in TEST_()
420 COMPARE(subs(w15, w16, Operand(w17, SXTB, 4)), "subs w15, w16, w17, sxtb #4"); in TEST_()
477 COMPARE(msub(w14, w15, w16, w17), "msub w14, w15, w16, w17"); in TEST_()
657 COMPARE(eor(w15, w16, Operand(0x00000001)), in TEST_()
718 COMPARE(bic(w15, w16, Operand(w17)), "bic w15, w16, w17"); in TEST_()
730 COMPARE(orn(w15, w16, Operand(w17)), "orn w15, w16, w17"); in TEST_()
742 COMPARE(eon(w15, w16, Operand(w17)), "eon w15, w16, w17"); in TEST_()
754 COMPARE(bics(w15, w16, Operand(w17)), "bics w15, w16, w17"); in TEST_()
772 COMPARE(orr(w16, wzr, Operand(w17, LSL, 1)), "orr w16, wzr, w17, lsl #1"); in TEST_()
859 COMPARE(str(w16, MemOperand(x17, 16380)), "str w16, [x17, #16380]"); in TEST_()
[all …]

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