/external/llvm/test/MC/Mips/msa/ |
D | test_3r.s | 12 # CHECK: adds_s.h $w5, $w23, $w26 # encoding: [0x79,0x3a,0xb9,0x50] 31 # CHECK: ave_s.b $w2, $w5, $w1 # encoding: [0x7a,0x01,0x28,0x90] 33 # CHECK: ave_s.w $w17, $w31, $w5 # encoding: [0x7a,0x45,0xfc,0x50] 51 # CHECK: binsl.b $w5, $w16, $w24 # encoding: [0x7b,0x18,0x81,0x4d] 52 # CHECK: binsl.h $w30, $w5, $w10 # encoding: [0x7b,0x2a,0x2f,0x8d] 63 # CHECK: bset.b $w31, $w5, $w31 # encoding: [0x7a,0x1f,0x2f,0xcd] 66 # CHECK: bset.d $w5, $w22, $w5 # encoding: [0x7a,0x65,0xb1,0x4d] 69 # CHECK: ceq.w $w9, $w5, $w14 # encoding: [0x78,0x4e,0x2a,0x4f] 70 # CHECK: ceq.d $w5, $w17, $w0 # encoding: [0x78,0x60,0x89,0x4f] 74 # CHECK: cle_s.d $w18, $w5, $w10 # encoding: [0x7a,0x6a,0x2c,0x8f] [all …]
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D | test_2rf.s | 8 # CHECK: fexupr.d $w5, $w2 # encoding: [0x7b,0x33,0x11,0x5e] 27 # CHECK: ftint_s.w $w30, $w5 # encoding: [0x7b,0x38,0x2f,0x9e] 28 # CHECK: ftint_s.d $w5, $w23 # encoding: [0x7b,0x39,0xb9,0x5e] 34 # CHECK: ftrunc_u.d $w5, $w27 # encoding: [0x7b,0x25,0xd9,0x5e] 41 fexupr.d $w5, $w2 60 ftint_s.w $w30, $w5 61 ftint_s.d $w5, $w23 67 ftrunc_u.d $w5, $w27
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D | invalid.s | 52 srari.b $w5, $w25, -1 # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate 53 srari.b $w5, $w25, 8 # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate 54 srari.h $w5, $w25, -1 # CHECK: :[[@LINE]]:24: error: expected 4-bit unsigned immediate 55 srari.h $w5, $w25, 16 # CHECK: :[[@LINE]]:24: error: expected 4-bit unsigned immediate 56 srari.w $w5, $w25, -1 # CHECK: :[[@LINE]]:24: error: expected 5-bit unsigned immediate 57 srari.w $w5, $w25, 32 # CHECK: :[[@LINE]]:24: error: expected 5-bit unsigned immediate 58 srari.d $w5, $w25, -1 # CHECK: :[[@LINE]]:24: error: expected 6-bit unsigned immediate 59 srari.d $w5, $w25, 64 # CHECK: :[[@LINE]]:24: error: expected 6-bit unsigned immediate
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D | invalid-64.s | 51 srari.b $w5, $w25, -1 # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate 52 srari.b $w5, $w25, 8 # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate 53 srari.h $w5, $w25, -1 # CHECK: :[[@LINE]]:24: error: expected 4-bit unsigned immediate 54 srari.h $w5, $w25, 16 # CHECK: :[[@LINE]]:24: error: expected 4-bit unsigned immediate 55 srari.w $w5, $w25, -1 # CHECK: :[[@LINE]]:24: error: expected 5-bit unsigned immediate 56 srari.w $w5, $w25, 32 # CHECK: :[[@LINE]]:24: error: expected 5-bit unsigned immediate 57 srari.d $w5, $w25, -1 # CHECK: :[[@LINE]]:24: error: expected 6-bit unsigned immediate 58 srari.d $w5, $w25, 64 # CHECK: :[[@LINE]]:24: error: expected 6-bit unsigned immediate
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D | test_3rf.s | 19 # CHECK: fcule.w $w17, $w5, $w3 # encoding: [0x79,0xc3,0x2c,0x5a] 47 # CHECK: fsaf.w $w25, $w5, $w10 # encoding: [0x7a,0x0a,0x2e,0x5a] 53 # CHECK: fslt.w $w12, $w5, $w6 # encoding: [0x7b,0x06,0x2b,0x1a] 72 # CHECK: ftq.w $w5, $w5, $w25 # encoding: [0x7a,0xb9,0x29,0x5b] 102 fcule.w $w17, $w5, $w3 130 fsaf.w $w25, $w5, $w10 136 fslt.w $w12, $w5, $w6 155 ftq.w $w5, $w5, $w25
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D | test_bit.s | 39 # CHECK: srari.b $w5, $w25, 0 # encoding: [0x79,0x70,0xc9,0x4a] 45 # CHECK: srli.w $w5, $w9, 4 # encoding: [0x79,0x44,0x49,0x49] 88 srari.b $w5, $w25, 0 94 srli.w $w5, $w9, 4
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/external/tcpdump/ |
D | print-tipc.c | 129 uint32_t w5; member 141 #define TIPC_SESS_NO(w5) (((w5) >> 16) & 0xFFFF) argument 151 uint32_t w5; member 156 #define TIPC_MEDIA_ID(w5) (((w5) >> 0) & 0xFF) argument 226 uint32_t w0, w1, w2, w4, w5, w9; in print_internal() local 273 w5 = EXTRACT_32BITS(&ap->w5); in print_internal() 274 sess_no = TIPC_SESS_NO(w5); in print_internal() 294 uint32_t w0, w1, w5; in print_link_conf() local 323 ND_TCHECK(ap->w5); in print_link_conf() 326 w5 = EXTRACT_32BITS(&ap->w5); in print_link_conf() [all …]
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/external/boringssl/linux-aarch64/crypto/sha/ |
D | sha1-armv8.S | 65 add w22,w22,w5 // future e+=X[i] 218 eor w3,w3,w5 244 eor w5,w5,w7 248 eor w5,w5,w13 252 eor w5,w5,w19 256 ror w5,w5,#31 267 add w21,w21,w5 // future e+=X[i] 293 eor w8,w8,w5 350 eor w13,w13,w5 418 eor w3,w3,w5 [all …]
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D | sha256-armv8.S | 66 ldp w5,w6,[x1],#2*4 89 rev w5,w5 // 2 97 add w25,w25,w5 // h+=X[i] 451 ror w10,w5,#7 458 eor w10,w10,w5,ror#18 466 eor w10,w10,w5,lsr#3 // sigma0(X[i+1]) 502 add w5,w5,w14 506 add w5,w5,w11 508 add w5,w5,w10 518 add w25,w25,w5 // h+=X[i] [all …]
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/external/libhevc/decoder/arm64/ |
D | ihevcd_fmt_conv_420sp_to_420p.s | 95 LDR w5, [sp,#88] ////Load u2_dest_stridey 96 sxtw x5,w5 102 LDR w5, [sp,#112] ////Load disable_luma_copy flag 103 sxtw x5,w5 143 LDR w5, [sp,#96] ////Load u2_dest_strideuv 144 sxtw x5,w5
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D | ihevcd_fmt_conv_420sp_to_420sp.s | 97 LDR w5, [sp,#80] ////Load u2_dest_stridey 98 sxtw x5,w5 153 LDR w5, [sp,#88] ////Load u2_dest_stridechroma 154 sxtw x5,w5
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/external/llvm/test/MC/AArch64/ |
D | arm64-basic-a64-instructions.s | 3 crc32b w5, w7, w20 7 crc32cb w9, w5, w4 9 crc32cw wzr, w3, w5
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D | basic-a64-instructions.s | 18 add x2, x4, w5, uxtb 36 add w2, w5, w7, uxtb 40 add w2, w5, w1, sxtb 43 add w2, w3, w5, sxtx 54 add x2, x3, w5, sxtb #0 64 sub x2, x4, w5, uxtb #2 81 sub w2, w5, w7, uxtb 85 sub w2, w5, w1, sxtb 88 sub w2, w3, w5, sxtx 99 adds x2, x4, w5, uxtb #2 [all …]
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D | arm64-memory.s | 8 ldr w5, [x4, #20] 17 ldrb w5, [x4, #20] 43 ; CHECK: ldr w5, [x4, #20] ; encoding: [0x85,0x14,0x40,0xb9] 52 ; CHECK: ldrb w5, [x4, #20] ; encoding: [0x85,0x50,0x40,0x39] 83 str w5, [x4, #20] 90 strb w5, [x4, #20] 95 ; CHECK: str w5, [x4, #20] ; encoding: [0x85,0x14,0x00,0xb9] 102 ; CHECK: strb w5, [x4, #20] ; encoding: [0x85,0x50,0x00,0x39] 143 stur w5, [x4, #20] 150 sturb w5, [x4, #20] [all …]
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D | basic-a64-diagnostics.s | 11 add w5, w7, x9, sxtx 79 add w4, w5, #-4096 80 add w5, w6, #0x1000 81 add w4, w5, #-4096, lsl #12 82 add w5, w6, #0x1000, lsl #12 98 add w5, w17, #0xfff, lsl #13 143 adds w0, w5, #0x10000 151 subs wsp, w5, #123 593 adc wsp, w3, w5 619 adcs wsp, w3, w5 [all …]
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/external/llvm/test/MC/Disassembler/Mips/msa/ |
D | test_3r.txt | 12 0x79 0x3a 0xb9 0x50 # CHECK: adds_s.h $w5, $w23, $w26 31 0x7a 0x01 0x28 0x90 # CHECK: ave_s.b $w2, $w5, $w1 33 0x7a 0x45 0xfc 0x50 # CHECK: ave_s.w $w17, $w31, $w5 51 0x7b 0x18 0x81 0x4d # CHECK: binsl.b $w5, $w16, $w24 52 0x7b 0x2a 0x2f 0x8d # CHECK: binsl.h $w30, $w5, $w10 63 0x7a 0x1f 0x2f 0xcd # CHECK: bset.b $w31, $w5, $w31 66 0x7a 0x65 0xb1 0x4d # CHECK: bset.d $w5, $w22, $w5 69 0x78 0x4e 0x2a 0x4f # CHECK: ceq.w $w9, $w5, $w14 70 0x78 0x60 0x89 0x4f # CHECK: ceq.d $w5, $w17, $w0 74 0x7a 0x6a 0x2c 0x8f # CHECK: cle_s.d $w18, $w5, $w10 [all …]
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D | test_2rf.txt | 8 0x7b 0x33 0x11 0x5e # CHECK: fexupr.d $w5, $w2 27 0x7b 0x38 0x2f 0x9e # CHECK: ftint_s.w $w30, $w5 28 0x7b 0x39 0xb9 0x5e # CHECK: ftint_s.d $w5, $w23 34 0x7b 0x25 0xd9 0x5e # CHECK: ftrunc_u.d $w5, $w27
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-crc32.txt | 3 # CHECK: crc32b w5, w7, w20 7 # CHECK: crc32cb w9, w5, w4 9 # CHECK: crc32cw wzr, w3, w5
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/external/vixl/examples/ |
D | add2-vectors.cc | 72 __ Ldrb(w5, MemOperand(x0)); in GenerateAdd2Vectors() 74 __ Add(w5, w5, w6); in GenerateAdd2Vectors() 75 __ Strb(w5, MemOperand(x0, 1, PostIndex)); in GenerateAdd2Vectors()
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/external/valgrind/none/tests/arm64/ |
D | integer.stdout.exp | 3 add w3, w4, w5 :: rd 0000000000004abe rm 0000000000003039, rn 0000000000001a85, cin 0, nzcv 0000000… 22 adc w3, w4, w5 :: rd 0000000000004abe rm 0000000000003039, rn 0000000000001a85, cin 0, nzcv 0000000… 23 adc w3, w4, w5 :: rd 0000000000004abf rm 0000000000003039, rn 0000000000001a85, cin 1, nzcv 2000000… 24 adc w3, w4, w5 :: rd 00000000ffffffff rm 0000000000000000, rn 00000000ffffffff, cin 0, nzcv 0000000… 25 adc w3, w4, w5 :: rd 0000000000000000 rm 0000000000000000, rn 00000000ffffffff, cin 1, nzcv 2000000… 26 adc w3, w4, w5 :: rd 000000005859704f rm 0000000031415927, rn 0000000027181728, cin 0, nzcv 0000000… 27 adc w3, w4, w5 :: rd 0000000058597050 rm 0000000031415927, rn 0000000027181728, cin 1, nzcv 2000000… 28 adc w3, w4, w5 :: rd 0000000000000000 rm 0000000000000000, rn 0000000000000000, cin 0, nzcv 0000000… 29 adc w3, w4, w5 :: rd 0000000000000001 rm 0000000000000000, rn 0000000000000000, cin 1, nzcv 2000000… 30 adc w3, w4, w5 :: rd 0000000000000001 rm 0000000000000001, rn 0000000000000000, cin 0, nzcv 0000000… [all …]
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/external/webrtc/webrtc/modules/audio_coding/codecs/isac/fix/source/ |
D | pitch_filter_mips.c | 26 int32_t w1, w2, w3, w4, w5, gain32, sign32; in WebRtcIsacfix_PitchFilterCore() local 122 [w5] "=&r" (w5), [input1] "+r" (input1), [out2_pos2] "+r" (out2_pos2), in WebRtcIsacfix_PitchFilterCore()
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/external/libhevc/common/arm64/ |
D | ihevc_sao_edge_offset_class2.s | 203 LDRB w5,[x5,#2] //pu1_avail[2] 291 LDRB w5,[x8,#16] //I pu1_src_cpy[src_strd + 16] 292 …mov v18.b[0], w5 //I pu1_next_row_tmp = vsetq_lane_u8(pu1_src_cpy[src_strd … 303 LDRB w5,[x2] //I load the value 357 LDRB w5,[x8,#16] //II pu1_src_cpy[src_strd + 16] 362 …mov v28.b[0], w5 //II pu1_next_row_tmp = vsetq_lane_u8(pu1_src_cpy[src_strd… 369 LDRB w5,[x5] //II load the value 389 LDRB w5,[x5] //III load the value 471 LDRB w5,[x8,#16] //pu1_src_cpy[src_strd + 16] 474 …mov v18.b[0], w5 //pu1_next_row_tmp = vsetq_lane_u8(pu1_src_cpy[src_strd + … [all …]
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D | ihevc_sao_edge_offset_class2_chroma.s | 305 LDRB w5,[x5,#2] //pu1_avail[2] 400 LDRH w5,[x8] //I pu1_src_cpy[src_strd + 16] 403 …mov v18.h[0], w5 //I pu1_next_row_tmp = vsetq_lane_u8(pu1_src_cpy[src_strd … 418 LDRB w5,[x13] //I load the value 422 LDRB w5,[x13] //I load the value 499 LDRH w5,[x8] //II pu1_src_cpy[src_strd + 16] 502 …mov v28.h[0], w5 //II pu1_next_row_tmp = vsetq_lane_u8(pu1_src_cpy[src_strd… 529 LDRB w5,[x13] //II load the value 556 LDRB w5,[x13] //III load the value 668 LDRH w5,[x8] //pu1_src_cpy[src_strd + 16] [all …]
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D | ihevc_sao_edge_offset_class3_chroma.s | 293 LDRB w5,[x5,#2] //pu1_avail[2] 391 LDRH w5,[x8,#2] //I 392 mov v18.h[7], w5 //I vsetq_lane_u8 489 LDRB w5,[x0,#17] //II load the value pu1_src_cpy[17 - src_strd] 525 LDRB w5,[x5,#3] //III pu1_avail[3] 531 LDRH w5,[x11,#2] //III 536 mov v18.h[7], w5 //III vsetq_lane_u8 660 LDRB w5,[x5,#3] //pu1_avail[3] 666 LDRH w5,[x8,#2] 671 mov v18.h[7], w5 //vsetq_lane_u8 [all …]
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/external/boringssl/linux-aarch64/crypto/aes/ |
D | aesv8-armx64.S | 290 cmp w5,#0 // en- or decrypting? 291 ldr w5,[x3,#240] 297 sub w5,w5,#6 299 sub w5,w5,#2 306 mov w6,w5 309 cmp w5,#2 335 cmp w5,#4 417 add w6,w5,#2 494 add w6,w5,#2 575 ldr w5,[x3,#240] [all …]
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