/external/valgrind/none/tests/x86/ |
D | insn_sse2.def | 1 addpd xmm.pd[1234.5678,8765.4321] xmm.pd[2222.2222,1111.1111] => 1.pd[3456.79,9876.5432] 2 addpd m128.pd[1234.5678,8765.4321] xmm.pd[2222.2222,1111.1111] => 1.pd[3456.79,9876.5432] 3 addsd xmm.pd[1234.5678,8765.4321] xmm.pd[2222.2222,1111.1111] => 1.pd[3456.79,1111.1111] 4 addsd m128.pd[1234.5678,8765.4321] xmm.pd[2222.2222,1111.1111] => 1.pd[3456.79,1111.1111] 5 andpd xmm.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789abcdef,0xfdb97531eca86420] =… 6 andpd m128.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789abcdef,0xfdb97531eca86420] … 7 andnpd xmm.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789abcdef,0xfdb97531eca86420] … 8 andnpd m128.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789abcdef,0xfdb97531eca86420]… 9 cmpeqpd xmm.pd[1234.5678,1234.5678] xmm.pd[1234.5678,1234.5679] => 1.uq[0xffffffffffffffff,0x000000… 10 cmpeqpd m128.pd[1234.5678,1234.5678] xmm.pd[1234.5678,1234.5679] => 1.uq[0xffffffffffffffff,0x00000… [all …]
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D | insn_sse.def | 1 addps xmm.ps[12.34,56.78,43.21,87.65] xmm.ps[44.44,33.33,22.22,11.11] => 1.ps[56.78,90.11,65.43,98.… 2 addps m128.ps[12.34,56.78,43.21,87.65] xmm.ps[44.44,33.33,22.22,11.11] => 1.ps[56.78,90.11,65.43,98… 3 addss xmm.ps[12.34,56.78,43.21,87.65] xmm.ps[44.44,33.33,22.22,11.11] => 1.ps[56.78,33.33,22.22,11.… 4 addss m128.ps[12.34,56.78,43.21,87.65] xmm.ps[44.44,33.33,22.22,11.11] => 1.ps[56.78,33.33,22.22,11… 5 andnps xmm.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789abcdef,0xfdb97531eca86420] … 6 andnps m128.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789abcdef,0xfdb97531eca86420]… 7 andps xmm.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789abcdef,0xfdb97531eca86420] =… 8 andps m128.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789abcdef,0xfdb97531eca86420] … 9 cmpeqps xmm.ps[234.5678,234.5678,234.5678,234.5678] xmm.ps[234.5678,234.5679,234.5678,234.5679] => … 10 cmpeqps m128.ps[234.5678,234.5678,234.5678,234.5678] xmm.ps[234.5678,234.5679,234.5678,234.5679] =>… [all …]
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D | insn_ssse3.def | 4 psignb xmm.ub[0,10,0,245,0,1,255,254,1,255,254,0,10,0,245,0] xmm.ub[0,40,80,120,160,200,240,24,3,2,… 5 psignb m128.ub[0,10,0,245,0,1,255,254,10,0,245,0,1,254,0] xmm.ub[0,41,79,119,161,199,241,23,0,31,69… 12 psignw xmm.sw[0,10,0,-11,1,0,-1,0] xmm.sw[999,987,986,985,888,887,886,885] => 1.sw[0,987,0,-985,888… 13 psignw m128.sw[0,1000,0,-1111,11,0,-11,0] xmm.sw[909,907,906,905,809,808,807,806] => 1.sw[0,907,0,-… 20 psignd xmm.sd[0,10000,-10000,0] xmm.sd[-5555,-6666,-7777,-8888] => 1.sd[0,-6666,7777,0] 21 psignd m128.sd[-11111,0,0,1111] xmm.sd[-9999,-10101,-11111,-22222] => 1.sd[9999,0,0,-22222] 28 pabsb xmm.ub[0,10,0,245,0,1,255,254,1,255,254,0,10,0,245,0] xmm.ub[0,40,80,120,160,200,240,24,3,2,1… 29 pabsb m128.ub[0,10,0,245,0,1,255,254,10,0,245,0,1,254,0] xmm.ub[0,41,79,119,161,199,241,23,0,31,69,… 36 pabsw xmm.sw[0,10,0,-11,1,0,-1,0] xmm.sw[999,987,986,985,888,887,886,885] => 1.sw[0,10,0,11,1,0,1,0] 37 pabsw m128.sw[0,1000,0,-1111,11,0,-11,0] xmm.sw[909,907,906,905,809,808,807,806] => 1.sw[0,1000,0,1… [all …]
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D | insn_sse3.def | 1 addsubpd m128.pd[1.11,2.22] xmm.pd[41.1,42.2] => 1.pd[39.99,44.42] 2 addsubpd xmm.pd[1.11,2.22] xmm.pd[41.1,42.2] => 1.pd[39.99,44.42] 3 addsubps m128.ps[1.11,2.22,3.33,4.44] xmm.ps[41.1,42.2,43.3,44.4] => 1.ps[39.99,44.42,39.97,48.84] 4 addsubps xmm.ps[1.11,2.22,3.33,4.44] xmm.ps[41.1,42.2,43.3,44.4] => 1.ps[39.99,44.42,39.97,48.84] 5 haddpd m128.pd[1.11,2.22] xmm.pd[41.1,42.2] => 1.pd[83.3,3.33] 6 haddpd xmm.pd[1.11,2.22] xmm.pd[41.1,42.2] => 1.pd[83.3,3.33] 7 haddps m128.ps[1.11,2.22,3.33,4.44] xmm.ps[41.1,42.2,43.3,44.4] => 1.ps[83.30,87.70,3.33,7.77] 8 haddps xmm.ps[1.11,2.22,3.33,4.44] xmm.ps[41.1,42.2,43.3,44.4] => 1.ps[83.30,87.70,3.33,7.77] 9 hsubpd m128.pd[9.11,2.22] xmm.pd[41.1,42.2] => 1.pd[-1.1,6.89] 10 hsubpd xmm.pd[9.11,2.22] xmm.pd[41.1,42.2] => 1.pd[-1.1,6.89] [all …]
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/external/valgrind/none/tests/amd64/ |
D | insn_sse2.def | 1 addpd xmm.pd[1234.5678,8765.4321] xmm.pd[2222.2222,1111.1111] => 1.pd[3456.79,9876.5432] 2 addpd m128.pd[1234.5678,8765.4321] xmm.pd[2222.2222,1111.1111] => 1.pd[3456.79,9876.5432] 3 addsd xmm.pd[1234.5678,8765.4321] xmm.pd[2222.2222,1111.1111] => 1.pd[3456.79,1111.1111] 4 addsd m128.pd[1234.5678,8765.4321] xmm.pd[2222.2222,1111.1111] => 1.pd[3456.79,1111.1111] 5 andpd xmm.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789abcdef,0xfdb97531eca86420] =… 6 andpd m128.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789abcdef,0xfdb97531eca86420] … 7 andnpd xmm.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789abcdef,0xfdb97531eca86420] … 8 andnpd m128.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789abcdef,0xfdb97531eca86420]… 9 cmpeqpd xmm.pd[1234.5678,1234.5678] xmm.pd[1234.5678,1234.5679] => 1.uq[0xffffffffffffffff,0x000000… 10 cmpeqpd m128.pd[1234.5678,1234.5678] xmm.pd[1234.5678,1234.5679] => 1.uq[0xffffffffffffffff,0x00000… [all …]
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D | insn_sse.def | 1 addps xmm.ps[12.34,56.78,43.21,87.65] xmm.ps[44.44,33.33,22.22,11.11] => 1.ps[56.78,90.11,65.43,98.… 2 addps m128.ps[12.34,56.78,43.21,87.65] xmm.ps[44.44,33.33,22.22,11.11] => 1.ps[56.78,90.11,65.43,98… 3 addss xmm.ps[12.34,56.78,43.21,87.65] xmm.ps[44.44,33.33,22.22,11.11] => 1.ps[56.78,33.33,22.22,11.… 4 addss m128.ps[12.34,56.78,43.21,87.65] xmm.ps[44.44,33.33,22.22,11.11] => 1.ps[56.78,33.33,22.22,11… 5 andnps xmm.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789abcdef,0xfdb97531eca86420] … 6 andnps m128.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789abcdef,0xfdb97531eca86420]… 7 andps xmm.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789abcdef,0xfdb97531eca86420] =… 8 andps m128.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789abcdef,0xfdb97531eca86420] … 9 cmpeqps xmm.ps[234.5678,234.5678,234.5678,234.5678] xmm.ps[234.5678,234.5679,234.5678,234.5679] => … 10 cmpeqps m128.ps[234.5678,234.5678,234.5678,234.5678] xmm.ps[234.5678,234.5679,234.5678,234.5679] =>… [all …]
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D | insn_pclmulqdq.def | 1 pclmulqdq imm8[0] xmm.uq[0x00017004200ab0cd,0xc000b802f6b31753] xmm.uq[0xa0005c0252074a9a,0x50002e0… 2 pclmulqdq imm8[1] xmm.uq[0x28001701e286710d,0xd4000b81d7f0f773] xmm.uq[0xaa0005c1c2a63aaa,0x550002e… 3 pclmulqdq imm8[16] xmm.uq[0x2a800171beae2d11,0xd54000b9b604d579] xmm.uq[0xaaa0005db1b029ad,0x955000… 4 pclmulqdq imm8[17] xmm.uq[0x8aa80018be70a8d2,0x4554000d3de61358] xmm.uq[0x22aa00077da0c89b,0xd15500… 5 pclmulqdq imm8[0] m128.uq[0x68aa8003296cd08e,0x3455400273642736] xmm.uq[0x1a2aa002185fd28a,0x0d1550… 6 pclmulqdq imm8[1] m128.uq[0x068aa801d41c9309,0xc3455401c0bc0875] xmm.uq[0xa1a2aa01c70bc327,0x90d155… 7 pclmulqdq imm8[16] m128.uq[0x4868aa81c3c78f2f,0xe4345541c8918684] xmm.uq[0x721a2aa1c2f68231,0xf90d1… 8 pclmulqdq imm8[17] m128.uq[0xbc868aa9cac23ef5,0x9e434555cc0ede67] xmm.uq[0x8f21a2abccb52e20,0x4790d… 9 pclmulqdq imm8[0] xmm.uq[0xe3c868ac4931e9ec,0x71e434570346b3e5] xmm.uq[0xf8f21a2c685118df,0xbc790d1… 10 pclmulqdq imm8[1] xmm.uq[0x5e3c868c6c18e49d,0xef1e43471cba313b] xmm.uq[0xb78f21a4650ad78e,0x5bc790d… [all …]
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D | insn_ssse3.def | 4 psignb xmm.ub[0,10,0,245,0,1,255,254,1,255,254,0,10,0,245,0] xmm.ub[0,40,80,120,160,200,240,24,3,2,… 5 psignb m128.ub[0,10,0,245,0,1,255,254,10,0,245,0,1,254,0] xmm.ub[0,41,79,119,161,199,241,23,0,31,69… 12 psignw xmm.sw[0,10,0,-11,1,0,-1,0] xmm.sw[999,987,986,985,888,887,886,885] => 1.sw[0,987,0,-985,888… 13 psignw m128.sw[0,1000,0,-1111,11,0,-11,0] xmm.sw[909,907,906,905,809,808,807,806] => 1.sw[0,907,0,-… 20 psignd xmm.sd[0,10000,-10000,0] xmm.sd[-5555,-6666,-7777,-8888] => 1.sd[0,-6666,7777,0] 21 psignd m128.sd[-11111,0,0,1111] xmm.sd[-9999,-10101,-11111,-22222] => 1.sd[9999,0,0,-22222] 28 pabsb xmm.ub[0,10,0,245,0,1,255,254,1,255,254,0,10,0,245,0] xmm.ub[0,40,80,120,160,200,240,24,3,2,1… 29 pabsb m128.ub[0,10,0,245,0,1,255,254,10,0,245,0,1,254,0] xmm.ub[0,41,79,119,161,199,241,23,0,31,69,… 36 pabsw xmm.sw[0,10,0,-11,1,0,-1,0] xmm.sw[999,987,986,985,888,887,886,885] => 1.sw[0,10,0,11,1,0,1,0] 37 pabsw m128.sw[0,1000,0,-1111,11,0,-11,0] xmm.sw[909,907,906,905,809,808,807,806] => 1.sw[0,1000,0,1… [all …]
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D | insn_sse3.def | 1 addsubpd m128.pd[1.11,2.22] xmm.pd[41.1,42.2] => 1.pd[39.99,44.42] 2 addsubpd xmm.pd[1.11,2.22] xmm.pd[41.1,42.2] => 1.pd[39.99,44.42] 3 addsubps m128.ps[1.11,2.22,3.33,4.44] xmm.ps[41.1,42.2,43.3,44.4] => 1.ps[39.99,44.42,39.97,48.84] 4 addsubps xmm.ps[1.11,2.22,3.33,4.44] xmm.ps[41.1,42.2,43.3,44.4] => 1.ps[39.99,44.42,39.97,48.84] 5 haddpd m128.pd[1.11,2.22] xmm.pd[41.1,42.2] => 1.pd[83.3,3.33] 6 haddpd xmm.pd[1.11,2.22] xmm.pd[41.1,42.2] => 1.pd[83.3,3.33] 7 haddps m128.ps[1.11,2.22,3.33,4.44] xmm.ps[41.1,42.2,43.3,44.4] => 1.ps[83.30,87.70,3.33,7.77] 8 haddps xmm.ps[1.11,2.22,3.33,4.44] xmm.ps[41.1,42.2,43.3,44.4] => 1.ps[83.30,87.70,3.33,7.77] 9 hsubpd m128.pd[9.11,2.22] xmm.pd[41.1,42.2] => 1.pd[-1.1,6.89] 10 hsubpd xmm.pd[9.11,2.22] xmm.pd[41.1,42.2] => 1.pd[-1.1,6.89] [all …]
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/external/llvm/test/CodeGen/X86/ |
D | sse-intel-ocl.ll | 8 ; WIN64: addps {{.*}}, {{%xmm[0-3]}} 9 ; WIN64: addps {{.*}}, {{%xmm[0-3]}} 10 ; WIN64: addps {{.*}}, {{%xmm[0-3]}} 11 ; WIN64: addps {{.*}}, {{%xmm[0-3]}} 18 ; WIN32: addps {{.*}}, {{%xmm[0-3]}} 19 ; WIN32: addps {{.*}}, {{%xmm[0-3]}} 20 ; WIN32: addps {{.*}}, {{%xmm[0-3]}} 21 ; WIN32: addps {{.*}}, {{%xmm[0-3]}} 26 ; NOT_WIN: addps {{.*}}, {{%xmm[0-3]}} 27 ; NOT_WIN: addps {{.*}}, {{%xmm[0-3]}} [all …]
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D | avx-arith.ll | 138 ; CHECK-NEXT: vpaddq %xmm 139 ; CHECK-NEXT: vpaddq %xmm 148 ; CHECK-NEXT: vpaddd %xmm 149 ; CHECK-NEXT: vpaddd %xmm 158 ; CHECK-NEXT: vpaddw %xmm 159 ; CHECK-NEXT: vpaddw %xmm 168 ; CHECK-NEXT: vpaddb %xmm 169 ; CHECK-NEXT: vpaddb %xmm 178 ; CHECK-NEXT: vpsubq %xmm 179 ; CHECK-NEXT: vpsubq %xmm [all …]
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D | stack-folding-int-avx1.ll | 13 …;CHECK: vaesdec {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byt… 22 …;CHECK: vaesdeclast {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9]*}} {{.*#+}} 16… 31 …;CHECK: vaesenc {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byt… 40 …;CHECK: vaesenclast {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9]*}} {{.*#+}} 16… 49 ;CHECK: vaesimc {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload 58 …;CHECK: vaeskeygenassist $7, {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded… 67 ;CHECK: movd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 4-byte Folded Reload 77 ;CHECK: movd {{%xmm[0-9][0-9]*}}, {{-?[0-9]*}}(%rsp) {{.*#+}} 4-byte Folded Spill 87 ;CHECK: movq {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload 97 ;CHECK: movq {{%xmm[0-9][0-9]*}}, {{-?[0-9]*}}(%rsp) {{.*#+}} 8-byte Folded Spill [all …]
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D | stack-folding-xop.ll | 13 ;CHECK: vfrczpd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload 31 ;CHECK: vfrczps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload 49 ;CHECK: vfrczsd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload 58 ;CHECK: vfrczss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload 67 …;CHECK: vpcmov {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9… 74 …;CHECK: vpcmov {{%xmm[0-9][0-9]*}}, {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9… 99 …;CHECK: vpcomltb {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9]*}} {{.*#+}} 16-by… 108 …;CHECK: vpcomltd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9]*}} {{.*#+}} 16-by… 117 …;CHECK: vpcomltq {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9]*}} {{.*#+}} 16-by… 126 …;CHECK: vpcomltub {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9]*}} {{.*#+}} 16-b… [all …]
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D | widen_load-2.ll | 9 ; CHECK: movdqa (%{{.*}}), %[[R0:xmm[0-9]+]] 22 ; CHECK: movq (%{{.*}}), %[[R0:xmm[0-9]+]] 24 ; CHECK-NEXT: movq (%{{.*}}), %[[R1:xmm[0-9]+]] 39 ; CHECK: movdqa (%{{.*}}), %[[R0:xmm[0-9]+]] 40 ; CHECK-NEXT: movdqa 16(%{{.*}}), %[[R1:xmm[0-9]+]] 56 ; CHECK: movdqa (%{{.*}}), %[[R0:xmm[0-9]+]] 57 ; CHECK-NEXT: movdqa 16(%{{.*}}), %[[R1:xmm[0-9]+]] 58 ; CHECK-NEXT: movdqa 32(%{{.*}}), %[[R2:xmm[0-9]+]] 76 ; CHECK: pmovzxwd (%{{.*}}), %[[R0:xmm[0-9]+]] 77 ; CHECK-NEXT: pmovzxwd (%{{.*}}), %[[R1:xmm[0-9]+]] [all …]
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D | avx512-scalar.ll | 5 ; AVX512: vdivss %xmm{{.*}} ## encoding: [0x62 7 ; AVX: vdivss %xmm{{.*}} ## encoding: [0xc5 15 ; AVX512: vsubss %xmm{{.*}} ## encoding: [0x62 17 ; AVX: vsubss %xmm{{.*}} ## encoding: [0xc5 25 ; AVX512: vaddsd %xmm{{.*}} ## encoding: [0x62 27 ; AVX: vaddsd %xmm{{.*}} ## encoding: [0xc5 52 ; AVX512: vsqrtsd %xmm{{.*}} ## encoding: [0x62 54 ; AVX: vsqrtsd %xmm{{.*}} ## encoding: [0xc5 72 ; AVX512: vmaxss %xmm{{.*}} ## encoding: [0x62 74 ; AVX: vmaxss %xmm{{.*}} ## encoding: [0xc5 [all …]
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D | vec_uint_to_fp.ll | 43 ; SSE: movdqa [[MASKCSTADDR]](%rip), [[MASK:%xmm[0-9]+]] 56 ; SSE41: movdqa [[LOWCSTADDR]](%rip), [[LOWVEC:%xmm[0-9]+]] 64 ; AVX: vpblendw $170, [[LOWCSTADDR]](%rip), %xmm0, [[LOWVEC:%xmm[0-9]+]] 65 ; AVX-NEXT: vpsrld $16, %xmm0, [[SHIFTVEC:%xmm[0-9]+]] 66 ; AVX-NEXT: vpblendw $170, [[HIGHCSTADDR]](%rip), [[SHIFTVEC]], [[HIGHVEC:%xmm[0-9]+]] 67 ; AVX-NEXT: vaddps [[MAGICCSTADDR]](%rip), [[HIGHVEC]], [[TMP:%xmm[0-9]+]] 73 ; AVX2: vpbroadcastd [[LOWCSTADDR]](%rip), [[LOWCST:%xmm[0-9]+]] 74 ; AVX2-NEXT: vpblendw $170, [[LOWCST]], %xmm0, [[LOWVEC:%xmm[0-9]+]] 75 ; AVX2-NEXT: vpsrld $16, %xmm0, [[SHIFTVEC:%xmm[0-9]+]] 76 ; AVX2-NEXT: vpbroadcastd [[HIGHCSTADDR]](%rip), [[HIGHCST:%xmm[0-9]+]] [all …]
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D | combine-multiplies.ll | 97 ; CHECK: movdqa .LCPI1_0, [[C11:%xmm[0-9]]] 99 ; CHECK-NEXT: movdqa .LCPI1_1, [[C22:%xmm[0-9]]] 100 ; CHECK-NEXT: pshufd $245, %xmm0, [[T1:%xmm[0-9]]] 101 ; CHECK-NEXT: pmuludq [[C22]], [[T2:%xmm[0-9]]] 102 ; CHECK-NEXT: pshufd $232, [[T2]], [[T3:%xmm[0-9]]] 103 ; CHECK-NEXT: pmuludq [[C22]], [[T4:%xmm[0-9]]] 104 ; CHECK-NEXT: pshufd $232, [[T4]], [[T5:%xmm[0-9]]] 105 ; CHECK-NEXT: punpckldq [[T5]], [[T6:%xmm[0-9]]] 106 ; CHECK-NEXT: movdqa .LCPI1_2, [[C242:%xmm[0-9]]] 108 ; CHECK-NEXT: paddd .LCPI1_3, [[C726:%xmm[0-9]]] [all …]
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D | avx-cmp.ll | 47 ; CHECK-NEXT: vpcmpgtd %xmm 48 ; CHECK-NEXT: vpcmpgtd %xmm 58 ; CHECK-NEXT: vpcmpgtq %xmm 59 ; CHECK-NEXT: vpcmpgtq %xmm 69 ; CHECK-NEXT: vpcmpgtw %xmm 70 ; CHECK-NEXT: vpcmpgtw %xmm 80 ; CHECK-NEXT: vpcmpgtb %xmm 81 ; CHECK-NEXT: vpcmpgtb %xmm 91 ; CHECK-NEXT: vpcmpeqd %xmm 92 ; CHECK-NEXT: vpcmpeqd %xmm [all …]
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D | soft-fp.ll | 11 ; CHECK-NOT: xmm{{[0-9]+}} 39 ; SOFT1-NOT: xmm{{[0-9]+}} 40 ; SOFT2-NOT: xmm{{[0-9]+}} 41 ; SSE1: xmm{{[0-9]+}} 42 ; SSE2: xmm{{[0-9]+}} 52 ; SOFT1-NOT: xmm{{[0-9]+}} 53 ; SOFT2-NOT: xmm{{[0-9]+}} 54 ; SSE1: xmm{{[0-9]+}} 55 ; SSE2: xmm{{[0-9]+}}
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D | vec_fpext.ll | 9 ; CHECK: cvtps2pd (%{{.+}}), %xmm{{[0-9]+}} 10 ; AVX: vcvtps2pd (%{{.+}}), %xmm{{[0-9]+}} 21 ; CHECK: cvtps2pd (%{{.+}}), %xmm{{[0-9]+}} 22 ; CHECK: cvtps2pd 8(%{{.+}}), %xmm{{[0-9]+}} 34 ; CHECK: cvtps2pd (%{{.+}}), %xmm{{[0-9]+}} 35 ; CHECK: cvtps2pd 8(%{{.+}}), %xmm{{[0-9]+}} 36 ; CHECK: cvtps2pd 16(%{{.+}}), %xmm{{[0-9]+}} 37 ; CHECK: cvtps2pd 24(%{{.+}}), %xmm{{[0-9]+}}
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D | stack-folding-fp-avx1.ll | 13 …;CHECK: vaddpd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte… 29 …;CHECK: vaddps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte… 45 …;CHECK: vaddsd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9]*}} {{.*#+}} 8-byte … 53 …;CHECK: vaddsd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte… 62 …;CHECK: vaddss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9]*}} {{.*#+}} 4-byte … 70 …;CHECK: vaddss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte… 79 …;CHECK: vaddsubpd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9]*}} {{.*#+}} 16-b… 97 …;CHECK: vaddsubps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9]*}} {{.*#+}} 16-b… 115 …;CHECK: vandnpd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byt… 143 …;CHECK: vandnps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byt… [all …]
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D | avx512vl-arith.ll | 407 ; CHECK: vpaddq %xmm{{.*}} 415 ; CHECK: vpaddq (%rdi), %xmm{{.*}} 424 ; CHECK: vpaddq (%rdi){1to2}, %xmm{{.*}} 435 ; CHECK: vpaddd %xmm{{.*}} 443 ; CHECK: vpaddd (%rdi), %xmm{{.*}} 452 ; CHECK: vpaddd LCP{{.*}}(%rip){1to4}, %xmm{{.*}} 460 ; CHECK: vpaddd %xmm{{.*%k[1-7].*}} 470 ; CHECK: vpaddd %xmm{{.*{%k[1-7]} {z}.*}} 480 ; CHECK: vpaddd (%rdi), %xmm{{.*%k[1-7]}} 491 ; CHECK: vpaddd LCP{{.*}}(%rip){1to4}, %xmm{{.*{%k[1-7]}}} [all …]
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D | 2011-12-15-vec_shift.ll | 9 ; CHECK-W-SSE4: psllw $4, [[REG1:%xmm.]] 10 ; CHECK-W-SSE4: pblendvb [[REG1]],{{ %xmm.}} 14 ; CHECK-WO-SSE4: psllw $5, [[REG1:%xmm.]] 15 ; CHECK-WO-SSE4: pxor [[REG2:%xmm.]], [[REG2:%xmm.]] 16 ; CHECK-WO-SSE4: pcmpgtb {{%xmm., }}[[REG2]]
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/external/valgrind/memcheck/tests/amd64-solaris/ |
D | context_sse.c | 24 ucp->uc_mcontext.fpregs.fp_reg_set.fpchip_state.xmm[0] = d0; in sighandler() 25 ucp->uc_mcontext.fpregs.fp_reg_set.fpchip_state.xmm[1] = x0; in sighandler() 84 fs->xmm[1]._q, fs->xmm[2]._q, fs->xmm[5]._q, fs->xmm[6]._q); in main() 87 if (fs->xmm[0]._q || fs->xmm[3]._q || fs->xmm[4]._q || fs->xmm[7]._q) in main()
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/external/valgrind/memcheck/tests/x86-solaris/ |
D | context_sse.c | 22 ucp->uc_mcontext.fpregs.fp_reg_set.fpchip_state.xmm[0] = d0; in sighandler() 23 ucp->uc_mcontext.fpregs.fp_reg_set.fpchip_state.xmm[1] = x0; in sighandler() 90 fs->xmm[1]._q, fs->xmm[2]._q, fs->xmm[5]._q, fs->xmm[6]._q); in main() 93 if (fs->xmm[0]._q || fs->xmm[3]._q || fs->xmm[4]._q || fs->xmm[7]._q) in main()
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