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Searched refs:cfg (Results 1 – 25 of 90) sorted by relevance

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/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/examples/
Dvpx_temporal_scalable_patterns.c64 vpx_codec_enc_cfg_t *cfg) { in set_rate_control_metrics() argument
68 const double framerate = cfg->g_timebase.den / cfg->g_timebase.num; in set_rate_control_metrics()
69 rc->layer_framerate[0] = framerate / cfg->ts_rate_decimator[0]; in set_rate_control_metrics()
70 rc->layer_pfb[0] = 1000.0 * cfg->ts_target_bitrate[0] / in set_rate_control_metrics()
72 for (i = 0; i < cfg->ts_number_layers; ++i) { in set_rate_control_metrics()
74 rc->layer_framerate[i] = framerate / cfg->ts_rate_decimator[i]; in set_rate_control_metrics()
76 (cfg->ts_target_bitrate[i] - cfg->ts_target_bitrate[i - 1]) / in set_rate_control_metrics()
89 vpx_codec_enc_cfg_t *cfg, in printout_rate_control_summary() argument
95 cfg->ts_number_layers); in printout_rate_control_summary()
96 for (i = 0; i < cfg->ts_number_layers; ++i) { in printout_rate_control_summary()
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Dvp8_multi_resolution_encoder.c133 const vpx_codec_enc_cfg_t *cfg, in write_ivf_file_header() argument
137 if(cfg->g_pass != VPX_RC_ONE_PASS && cfg->g_pass != VPX_RC_LAST_PASS) in write_ivf_file_header()
146 mem_put_le16(header+12, cfg->g_w); /* width */ in write_ivf_file_header()
147 mem_put_le16(header+14, cfg->g_h); /* height */ in write_ivf_file_header()
148 mem_put_le32(header+16, cfg->g_timebase.den); /* rate */ in write_ivf_file_header()
149 mem_put_le32(header+20, cfg->g_timebase.num); /* scale */ in write_ivf_file_header()
177 vpx_codec_enc_cfg_t cfg[NUM_ENCODERS]; in main() local
248 res[i] = vpx_codec_enc_config_default(interface, &cfg[i], 0); in main()
259 cfg[0].g_w = width; in main()
260 cfg[0].g_h = height; in main()
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Dset_maps.c64 static void set_roi_map(const vpx_codec_enc_cfg_t *cfg, in set_roi_map() argument
69 roi.rows = (cfg->g_h + 15) / 16; in set_roi_map()
70 roi.cols = (cfg->g_w + 15) / 16; in set_roi_map()
97 static void set_active_map(const vpx_codec_enc_cfg_t *cfg, in set_active_map() argument
102 map.rows = (cfg->g_h + 15) / 16; in set_active_map()
103 map.cols = (cfg->g_w + 15) / 16; in set_active_map()
115 static void unset_active_map(const vpx_codec_enc_cfg_t *cfg, in unset_active_map() argument
119 map.rows = (cfg->g_h + 15) / 16; in unset_active_map()
120 map.cols = (cfg->g_w + 15) / 16; in unset_active_map()
157 vpx_codec_enc_cfg_t cfg = {0}; in main() local
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Dtwopass_encoder.c126 vpx_codec_enc_cfg_t cfg; in main() local
173 res = vpx_codec_enc_config_default(encoder->interface(), &cfg, 0); in main()
177 cfg.g_w = info.frame_width; in main()
178 cfg.g_h = info.frame_height; in main()
179 cfg.g_timebase.num = info.time_base.numerator; in main()
180 cfg.g_timebase.den = info.time_base.denominator; in main()
181 cfg.rc_target_bitrate = bitrate; in main()
187 cfg.g_pass = VPX_RC_FIRST_PASS; in main()
189 cfg.g_pass = VPX_RC_LAST_PASS; in main()
190 cfg.rc_twopass_stats_in = stats; in main()
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Dsimple_encoder.c152 vpx_codec_enc_cfg_t cfg; in main() local
212 res = vpx_codec_enc_config_default(encoder->interface(), &cfg, 0); in main()
216 cfg.g_w = info.frame_width; in main()
217 cfg.g_h = info.frame_height; in main()
218 cfg.g_timebase.num = info.time_base.numerator; in main()
219 cfg.g_timebase.den = info.time_base.denominator; in main()
220 cfg.rc_target_bitrate = bitrate; in main()
221 cfg.g_error_resilient = argc > 7 ? strtol(argv[7], NULL, 0) : 0; in main()
230 if (vpx_codec_enc_init(&codec, encoder->interface(), &cfg, 0)) in main()
Dvp8cx_set_ref.c98 vpx_codec_enc_cfg_t cfg = {0}; in main() local
143 res = vpx_codec_enc_config_default(encoder->interface(), &cfg, 0); in main()
147 cfg.g_w = info.frame_width; in main()
148 cfg.g_h = info.frame_height; in main()
149 cfg.g_timebase.num = info.time_base.numerator; in main()
150 cfg.g_timebase.den = info.time_base.denominator; in main()
151 cfg.rc_target_bitrate = bitrate; in main()
160 if (vpx_codec_enc_init(&codec, encoder->interface(), &cfg, 0)) in main()
Dexample_xma.c80 vpx_codec_dec_cfg_t cfg; in main() local
140 cfg.w = w; in main()
141 cfg.h = h; in main()
144 if (vpx_codec_dec_init(&decoder, iface, &cfg, VPX_CODEC_USE_XMA)) { in main()
189 decoder.name, alloc_sz, cfg.w, cfg.h); in main()
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/
Dvp8_cx_iface.c44 struct vp8_extracfg cfg; member
80 vpx_codec_enc_cfg_t cfg; member
136 const vpx_codec_enc_cfg_t *cfg, in validate_config() argument
140 RANGE_CHECK(cfg, g_w, 1, 16383); /* 14 bits available */ in validate_config()
141 RANGE_CHECK(cfg, g_h, 1, 16383); /* 14 bits available */ in validate_config()
142 RANGE_CHECK(cfg, g_timebase.den, 1, 1000000000); in validate_config()
143 RANGE_CHECK(cfg, g_timebase.num, 1, cfg->g_timebase.den); in validate_config()
144 RANGE_CHECK_HI(cfg, g_profile, 3); in validate_config()
145 RANGE_CHECK_HI(cfg, rc_max_quantizer, 63); in validate_config()
146 RANGE_CHECK_HI(cfg, rc_min_quantizer, cfg->rc_max_quantizer); in validate_config()
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/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/
Dvp9_cx_iface.c45 struct vp9_extracfg cfg; member
76 vpx_codec_enc_cfg_t cfg; member
143 const vpx_codec_enc_cfg_t *cfg, in validate_config() argument
145 RANGE_CHECK(cfg, g_w, 1, 65535); // 16 bits available in validate_config()
146 RANGE_CHECK(cfg, g_h, 1, 65535); // 16 bits available in validate_config()
147 RANGE_CHECK(cfg, g_timebase.den, 1, 1000000000); in validate_config()
148 RANGE_CHECK(cfg, g_timebase.num, 1, cfg->g_timebase.den); in validate_config()
149 RANGE_CHECK_HI(cfg, g_profile, 3); in validate_config()
151 RANGE_CHECK_HI(cfg, rc_max_quantizer, 63); in validate_config()
152 RANGE_CHECK_HI(cfg, rc_min_quantizer, cfg->rc_max_quantizer); in validate_config()
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/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/test/
Dcodec_factory.h35 virtual Decoder* CreateDecoder(vpx_codec_dec_cfg_t cfg,
38 virtual Encoder* CreateEncoder(vpx_codec_enc_cfg_t cfg,
43 virtual vpx_codec_err_t DefaultEncoderConfig(vpx_codec_enc_cfg_t *cfg,
72 VP8Decoder(vpx_codec_dec_cfg_t cfg, unsigned long deadline) in VP8Decoder() argument
73 : Decoder(cfg, deadline) {} in VP8Decoder()
87 VP8Encoder(vpx_codec_enc_cfg_t cfg, unsigned long deadline, in VP8Encoder() argument
89 : Encoder(cfg, deadline, init_flags, stats) {} in VP8Encoder()
105 virtual Decoder* CreateDecoder(vpx_codec_dec_cfg_t cfg, in CreateDecoder() argument
108 return new VP8Decoder(cfg, deadline); in CreateDecoder()
114 virtual Encoder* CreateEncoder(vpx_codec_enc_cfg_t cfg, in CreateEncoder() argument
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Dtile_independence_test.cc32 vpx_codec_dec_cfg_t cfg; in TileIndependenceTest() local
33 cfg.w = 704; in TileIndependenceTest()
34 cfg.h = 144; in TileIndependenceTest()
35 cfg.threads = 1; in TileIndependenceTest()
36 fw_dec_ = codec_->CreateDecoder(cfg, 0); in TileIndependenceTest()
37 inv_dec_ = codec_->CreateDecoder(cfg, 0); in TileIndependenceTest()
/hardware/bsp/intel/soc/common/tools/
Dgpt_ini2bin.py28 def preparse_partitions(gpt_in, cfg): argument
32 partitions = cfg.get('base', 'partitions').split()
50 cfg = ConfigParser.SafeConfigParser()
52 cfg.read(gpt_in)
54 part = preparse_partitions(gpt_in, cfg)
58 if cfg.has_option('base', 'start_lba'):
59 start_lba = cfg.getint('base', 'start_lba')
67 length = cfg.get('partition.' + p, 'len')
70 label = cfg.get('partition.' + p, 'label').encode('utf-16le')
73 guid_type = cfg.get('partition.' + p, 'type')
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/hardware/ti/omap3/omx/system/src/openmax_il/perf/src/
Dperf_config.c116 void read_line(PERF_Config *cfg, char const *line, char const *tag) in read_line() argument
142 if (!(assign_long_if_matches(line, "mask", &cfg->mask) || in read_line()
144 assign_string_if_matches(line, "trace_file", &cfg->trace_file) || in read_line()
145 assign_long_if_matches(line, "delayed_open", &cfg->delayed_open) || in read_line()
146 assign_long_if_matches(line, "buffer_size", &cfg->buffer_size) || in read_line()
148 assign_string_if_matches(line, "log_file", &cfg->log_file) || in read_line()
149 assign_long_if_matches(line, "debug", &cfg->debug) || in read_line()
150 assign_long_if_matches(line, "detailed_debug",&cfg->detailed_debug) || in read_line()
151 assign_long_if_matches(line, "csv", &cfg->csv) || in read_line()
153 assign_string_if_matches(line, "replay_file", &cfg->replay_file) || in read_line()
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/hardware/qcom/camera/QCamera2/util/
DQCameraFlash.cpp177 struct msm_flash_cfg_data_t cfg; in initFlash() local
179 memset(&cfg, 0, sizeof(struct msm_flash_cfg_data_t)); in initFlash()
182 cfg.cfg.flash_init_info = &init_info; in initFlash()
183 cfg.cfg_type = CFG_FLASH_INIT; in initFlash()
186 &cfg); in initFlash()
222 struct msm_flash_cfg_data_t cfg; in setFlashMode() local
236 memset(&cfg, 0, sizeof(struct msm_flash_cfg_data_t)); in setFlashMode()
238 cfg.flash_current[i] = QCAMERA_TORCH_CURRENT_VALUE; in setFlashMode()
239 cfg.cfg_type = mode ? CFG_FLASH_LOW: CFG_FLASH_OFF; in setFlashMode()
243 &cfg); in setFlashMode()
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/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/
Dvideo_writer.c25 struct vpx_codec_enc_cfg cfg; in write_header() local
26 cfg.g_w = info->frame_width; in write_header()
27 cfg.g_h = info->frame_height; in write_header()
28 cfg.g_timebase.num = info->time_base.numerator; in write_header()
29 cfg.g_timebase.den = info->time_base.denominator; in write_header()
31 ivf_write_file_header(file, &cfg, info->codec_fourcc, frame_count); in write_header()
Divfenc.c17 const struct vpx_codec_enc_cfg *cfg, in ivf_write_file_header() argument
29 mem_put_le16(header + 12, cfg->g_w); // width in ivf_write_file_header()
30 mem_put_le16(header + 14, cfg->g_h); // height in ivf_write_file_header()
31 mem_put_le32(header + 16, cfg->g_timebase.den); // rate in ivf_write_file_header()
32 mem_put_le32(header + 20, cfg->g_timebase.num); // scale in ivf_write_file_header()
Dvpxenc.c604 struct vpx_codec_enc_cfg cfg; member
824 &stream->config.cfg, in new_stream()
832 stream->config.cfg.g_timebase.den = 1000; in new_stream()
837 stream->config.cfg.g_w = 0; in new_stream()
838 stream->config.cfg.g_h = 0; in new_stream()
852 stream->config.cfg.g_lag_in_frames = 0; in new_stream()
909 config->cfg.g_threads = arg_parse_uint(&arg); in parse_stream_params()
911 config->cfg.g_profile = arg_parse_uint(&arg); in parse_stream_params()
913 config->cfg.g_w = arg_parse_uint(&arg); in parse_stream_params()
915 config->cfg.g_h = arg_parse_uint(&arg); in parse_stream_params()
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Drate_hist.h22 struct rate_hist *init_rate_histogram(const vpx_codec_enc_cfg_t *cfg,
28 const vpx_codec_enc_cfg_t *cfg,
33 void show_rate_histogram(struct rate_hist *hist, const vpx_codec_enc_cfg_t *cfg,
Drate_hist.c37 struct rate_hist *init_rate_histogram(const vpx_codec_enc_cfg_t *cfg, in init_rate_histogram() argument
45 hist->samples = cfg->rc_buf_sz * 5 / 4 * fps->num / fps->den / 1000; in init_rate_histogram()
74 const vpx_codec_enc_cfg_t *cfg, in update_rate_histogram() argument
81 (uint64_t)cfg->g_timebase.num / in update_rate_histogram()
82 (uint64_t)cfg->g_timebase.den; in update_rate_histogram()
88 if (now < cfg->rc_buf_initial_sz) in update_rate_histogram()
98 if (now - then > cfg->rc_buf_sz) in update_rate_histogram()
107 idx = (int)(avg_bitrate * (RATE_BINS / 2) / (cfg->rc_target_bitrate * 1000)); in update_rate_histogram()
269 const vpx_codec_enc_cfg_t *cfg, int max_buckets) { in show_rate_histogram() argument
279 fprintf(stderr, "\nRate (over %dms window):\n", cfg->rc_buf_sz); in show_rate_histogram()
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vpx/
Dvpx_encoder.h688 vpx_codec_enc_cfg_t *cfg,
697 #define vpx_codec_enc_init(ctx, iface, cfg, flags) \ argument
698 vpx_codec_enc_init_ver(ctx, iface, cfg, flags, VPX_ENCODER_ABI_VERSION)
727 vpx_codec_enc_cfg_t *cfg,
738 #define vpx_codec_enc_init_multi(ctx, iface, cfg, num_enc, flags, dsf) \ argument
739 vpx_codec_enc_init_multi_ver(ctx, iface, cfg, num_enc, flags, dsf, \
763 vpx_codec_enc_cfg_t *cfg,
782 const vpx_codec_enc_cfg_t *cfg);
/hardware/libhardware/tests/hwc/
Dutil.c116 EGLConfig *cfg; in select_config_for_window() local
136 cfg = (EGLConfig*) malloc(sizeof(EGLConfig) * max); in select_config_for_window()
137 if (!cfg) in select_config_for_window()
140 if (eglChooseConfig(dpy, attr, cfg, max, &n) == EGL_FALSE) { in select_config_for_window()
147 eglGetConfigAttrib(dpy, cfg[i], EGL_RED_SIZE, &r); in select_config_for_window()
148 eglGetConfigAttrib(dpy, cfg[i], EGL_GREEN_SIZE, &g); in select_config_for_window()
149 eglGetConfigAttrib(dpy, cfg[i], EGL_BLUE_SIZE, &b); in select_config_for_window()
150 eglGetConfigAttrib(dpy, cfg[i], EGL_ALPHA_SIZE, &a); in select_config_for_window()
152 *config = cfg[i]; in select_config_for_window()
153 free(cfg); in select_config_for_window()
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/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vpx/src/
Dvpx_encoder.c25 vpx_codec_enc_cfg_t *cfg, in vpx_codec_enc_init_ver() argument
32 else if (!ctx || !iface || !cfg) in vpx_codec_enc_init_ver()
51 ctx->config.enc = cfg; in vpx_codec_enc_init_ver()
68 vpx_codec_enc_cfg_t *cfg, in vpx_codec_enc_init_multi_ver() argument
77 else if (!ctx || !iface || !cfg || (num_enc > 16 || num_enc < 1)) in vpx_codec_enc_init_multi_ver()
95 if (!(res = iface->enc.mr_get_mem_loc(cfg, &mem_loc))) { in vpx_codec_enc_init_multi_ver()
117 cfg->kf_mode = VPX_KF_DISABLED; in vpx_codec_enc_init_multi_ver()
123 ctx->config.enc = cfg; in vpx_codec_enc_init_multi_ver()
149 cfg++; in vpx_codec_enc_init_multi_ver()
161 vpx_codec_enc_cfg_t *cfg, in vpx_codec_enc_config_default() argument
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/hardware/ti/omap4xxx/hwc/
Dhwc.c210 struct dss2_ovl_cfg *c = &oi->cfg; in dump_dsscomp()
273 dump_printf(&log, "%d=", dsscomp->ovls[i].cfg.ix); in dump_set_info()
274 if (dsscomp->ovls[i].cfg.enabled) in dump_set_info()
277 dsscomp->ovls[i].cfg.width, in dump_set_info()
278 dsscomp->ovls[i].cfg.height, in dump_set_info()
279 DSS_FMT(dsscomp->ovls[i].cfg.color_mode)); in dump_set_info()
457 struct dss2_ovl_cfg *oc = &ovl->cfg; in omap4_hwc_setup_layer()
592 crop_to_rect(struct dss2_ovl_cfg *cfg, struct hwc_rect vis_rect) in crop_to_rect() argument
602 win.xy[0] = cfg->win.x; win.xy[1] = cfg->win.y; in crop_to_rect()
603 win.wh[0] = cfg->win.w; win.wh[1] = cfg->win.h; in crop_to_rect()
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/hardware/qcom/msm8994/original-kernel-headers/media/
Dmsm_cam_sensor.h233 } cfg; member
241 } cfg; member
249 } cfg; member
289 } cfg; member
353 } cfg; member
374 } cfg; member
534 } cfg; member
553 } cfg; member
585 } cfg; member
601 } cfg; member
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/hardware/ti/omap4-aah/hwc/
Dhwc.c299 struct dss2_ovl_cfg *c = &oi->cfg; in dump_dsscomp()
369 dump_printf(&log, "%d=", dsscomp->ovls[i].cfg.ix); in dump_set_info()
370 if (dsscomp->ovls[i].cfg.enabled) in dump_set_info()
373 dsscomp->ovls[i].cfg.width, in dump_set_info()
374 dsscomp->ovls[i].cfg.height, in dump_set_info()
375 DSS_FMT(dsscomp->ovls[i].cfg.color_mode)); in dump_set_info()
646 struct dss2_ovl_cfg *oc = &ovl->cfg; in omap4_hwc_setup_layer()
781 crop_to_rect(struct dss2_ovl_cfg *cfg, struct hwc_rect vis_rect) in crop_to_rect() argument
791 win.xy[0] = cfg->win.x; win.xy[1] = cfg->win.y; in crop_to_rect()
792 win.wh[0] = cfg->win.w; win.wh[1] = cfg->win.h; in crop_to_rect()
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