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Searched refs:SSE (Results 1 – 19 of 19) sorted by relevance

/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/encoder/x86/
Dvp9_variance_impl_intrin_avx2.c17 unsigned int *SSE, in vp9_get16x16var_avx2() argument
118 *((int*)SSE)= _mm_cvtsi128_si32(madd_res); in vp9_get16x16var_avx2()
128 unsigned int *SSE, in vp9_get32x32var_avx2() argument
207 *((int*)SSE)= _mm_cvtsi128_si32(_mm256_castsi256_si128(madd_ref_src)) + in vp9_get32x32var_avx2()
Dvp9_variance_avx2.c21 unsigned int *SSE,
31 unsigned int *SSE,
41 unsigned int *SSE,
Dvp9_variance_mmx.c22 unsigned int *SSE,
31 unsigned int *SSE,
Dvp9_variance_sse2.c23 unsigned int *SSE,
33 unsigned int *SSE,
42 unsigned int *SSE,
111 unsigned int *SSE,
Dvp9_subpel_variance_impl_sse2.asm114 mov rdi, arg(6) ;[SSE]
221 mov rdi, arg(6) ;[SSE]
325 mov rdi, arg(6) ;[SSE]
Dvp9_variance_impl_sse2.asm78 ; unsigned int * SSE,
198 mov rdi, arg(4) ;[SSE]
222 ; unsigned int * SSE,
383 mov rdi, arg(4) ;[SSE]
Dvp9_variance_impl_mmx.asm72 ; unsigned int *SSE,
295 mov rsi, arg(4) ;SSE
320 ; unsigned int *SSE,
410 mov rsi, arg(4) ;SSE
Dvp9_subpel_variance.asm71 ; This function returns the SE and stores SSE in the given pointer.
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/ppc/
Dcsystemdependent.c58 …c_ptr, int source_stride, unsigned char *ref_ptr, int recon_stride, unsigned int *SSE, int *Sum);
118 …c_ptr, int source_stride, unsigned char *ref_ptr, int recon_stride, unsigned int *SSE, int *Sum);
119 …c_ptr, int source_stride, unsigned char *ref_ptr, int recon_stride, unsigned int *SSE, int *Sum);
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/x86/
Dvariance_sse2.c40 unsigned int *SSE,
54 unsigned int *SSE,
63 unsigned int *SSE,
Dvariance_ssse3.c22 unsigned int *SSE,
Dvariance_mmx.c45 unsigned int *SSE,
54 unsigned int *SSE,
Dvariance_impl_sse2.asm80 ; unsigned int * SSE,
200 mov rdi, arg(4) ;[SSE]
224 ; unsigned int * SSE,
385 mov rdi, arg(4) ;[SSE]
906 mov rdi, arg(6) ;[SSE]
1121 mov rdi, arg(6) ;[SSE]
1331 mov rdi, arg(6) ;[SSE]
Dvariance_impl_mmx.asm72 ; unsigned int *SSE,
295 mov rsi, arg(4) ;SSE
320 ; unsigned int *SSE,
410 mov rsi, arg(4) ;SSE
Dvariance_impl_ssse3.asm336 mov rdi, arg(8) ;[SSE]
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/ppc/
Dvariance_altivec.asm154 ;# r7 unsigned int *SSE
176 ;# r7 unsigned int *SSE
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/test/
Dsad_test.cc439 INSTANTIATE_TEST_CASE_P(SSE, SADTest, ::testing::Values(
445 INSTANTIATE_TEST_CASE_P(SSE, SADx4Test, ::testing::Values(
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/third_party/x86inc/
Dx86inc.asm973 ; whereas SSE emulation of 3arg prefers to have it in src1 (i.e. the mov).
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/
DCHANGELOG560 Replace pinsrw (SSE) with MMX instructions