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/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/mips/dspr2/
Dvp9_itrans16_dspr2.c30 int load1, load2, load3, load4, load5, load6, load7, load8; in idct16_rows_dspr2() local
135 [load7] "=&r" (load7), [load8] "=&r" (load8), in idct16_rows_dspr2()
262 [load7] "=&r" (load7), [load8] "=&r" (load8), in idct16_rows_dspr2()
416 int load1, load2, load3, load4, load5, load6, load7, load8; in idct16_cols_add_blk_dspr2() local
531 [load7] "=&r" (load7), [load8] "=&r" (load8), in idct16_cols_add_blk_dspr2()
659 [load7] "=&r" (load7), [load8] "=&r" (load8), in idct16_cols_add_blk_dspr2()
878 : [load5] "=&r" (load5), [load6] "=&r" (load6), [load7] "=&r" (load7), in idct16_cols_add_blk_dspr2()