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/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/
Dvp9_common.mk94 VP9_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/vp9_common_dspr2.h
95 VP9_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/vp9_convolve2_avg_dspr2.c
96 VP9_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/vp9_convolve2_avg_horiz_dspr2.c
97 VP9_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/vp9_convolve2_dspr2.c
98 VP9_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/vp9_convolve2_horiz_dspr2.c
99 VP9_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/vp9_convolve2_vert_dspr2.c
100 VP9_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/vp9_convolve8_avg_dspr2.c
101 VP9_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/vp9_convolve8_avg_horiz_dspr2.c
102 VP9_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/vp9_convolve8_dspr2.c
103 VP9_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/vp9_convolve8_horiz_dspr2.c
[all …]
/hardware/intel/common/omx-components/videocodec/libvpx_internal/mips-dspr2/
Dlibvpx_srcs.txt35 vp8/common/mips/dspr2/dequantize_dspr2.c
36 vp8/common/mips/dspr2/filter_dspr2.c
37 vp8/common/mips/dspr2/idct_blk_dspr2.c
38 vp8/common/mips/dspr2/idctllm_dspr2.c
39 vp8/common/mips/dspr2/loopfilter_filters_dspr2.c
40 vp8/common/mips/dspr2/reconinter_dspr2.c
135 vp9/common/mips/dspr2/vp9_common_dspr2.h
136 vp9/common/mips/dspr2/vp9_convolve2_avg_dspr2.c
137 vp9/common/mips/dspr2/vp9_convolve2_avg_horiz_dspr2.c
138 vp9/common/mips/dspr2/vp9_convolve2_dspr2.c
[all …]
/hardware/intel/common/omx-components/videocodec/libvpx_internal/
Dlibvpx.mk17 ifeq ($(TARGET_ARCH),mips)
20 libvpx_target := mips-dspr2
23 libvpx_target := mips
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/
Dvp8_common.mk122 VP8_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/idctllm_dspr2.c
123 VP8_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/filter_dspr2.c
124 VP8_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/loopfilter_filters_dspr2.c
125 VP8_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/reconinter_dspr2.c
126 VP8_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/idct_blk_dspr2.c
127 VP8_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/dequantize_dspr2.c
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/build/make/
Drtcd.pl301 sub mips() { subroutine
376 mips;
Dconfigure.sh720 mips*) enable_feature mips;;
997 mips*)
1244 mips*)
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vpx_scale/
Dvpx_scale.mk19 SCALE_SRCS-$(HAVE_DSPR2) += mips/dspr2/yv12extend_dspr2.c
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/
DAUTHORS25 Dragan Mrdjan <dmrdjan@mips.com>
Dconfigure670 if enabled mips; then