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Searched refs:pins (Results 1 – 25 of 31) sorted by relevance

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/hardware/bsp/intel/peripheral/libmraa/src/arm/
Dbeaglebone.c319 if (plat->pins[pin].capabilites.pwm != 1) { in mraa_beaglebone_pwm_init_replace()
343 sprintf(devpath, SYSFS_CLASS_PWM "pwm%u", plat->pins[pin].pwm.pinmap); in mraa_beaglebone_pwm_init_replace()
352 if (fprintf(fh, "%d", plat->pins[pin].pwm.pinmap) < 0) { in mraa_beaglebone_pwm_init_replace()
364 dev->pin = plat->pins[pin].pwm.pinmap; in mraa_beaglebone_pwm_init_replace()
515 b->pins = (mraa_pininfo_t*) calloc(b->phy_pin_count,sizeof(mraa_pininfo_t)); in mraa_beaglebone()
516 if (b->pins == NULL) { in mraa_beaglebone()
522 free(b->pins); in mraa_beaglebone()
531 strncpy(b->pins[0].name, "INVALID", MRAA_PIN_NAME_SIZE); in mraa_beaglebone()
532 b->pins[0].capabilites = (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }; in mraa_beaglebone()
534 strncpy(b->pins[1].name, "GND", MRAA_PIN_NAME_SIZE); in mraa_beaglebone()
[all …]
Draspberry_pi.c283 b->pins = (mraa_pininfo_t*) calloc(b->phy_pin_count, sizeof(mraa_pininfo_t)); in mraa_raspberry_pi()
284 if (b->pins == NULL) { in mraa_raspberry_pi()
294 strncpy(b->pins[0].name, "INVALID", MRAA_PIN_NAME_SIZE); in mraa_raspberry_pi()
295 b->pins[0].capabilites = (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }; in mraa_raspberry_pi()
297 strncpy(b->pins[1].name, "3V3", MRAA_PIN_NAME_SIZE); in mraa_raspberry_pi()
298 b->pins[1].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; in mraa_raspberry_pi()
300 strncpy(b->pins[2].name, "5V", MRAA_PIN_NAME_SIZE); in mraa_raspberry_pi()
301 b->pins[2].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; in mraa_raspberry_pi()
303 strncpy(b->pins[3].name, "SDA0", MRAA_PIN_NAME_SIZE); in mraa_raspberry_pi()
304 b->pins[3].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 }; in mraa_raspberry_pi()
[all …]
Dbanana.c296 b->pins = (mraa_pininfo_t*) calloc(b->phy_pin_count, sizeof(mraa_pininfo_t)); in mraa_banana()
297 if (b->pins == NULL) { in mraa_banana()
307 strncpy(b->pins[0].name, "INVALID", MRAA_PIN_NAME_SIZE); in mraa_banana()
308 b->pins[0].capabilites = (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }; in mraa_banana()
310 strncpy(b->pins[1].name, "3V3", MRAA_PIN_NAME_SIZE); in mraa_banana()
311 b->pins[1].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; in mraa_banana()
313 strncpy(b->pins[2].name, "5V", MRAA_PIN_NAME_SIZE); in mraa_banana()
314 b->pins[2].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; in mraa_banana()
317 strncpy(b->pins[3].name, "TWI2-SDA", MRAA_PIN_NAME_SIZE); // PB21 Pin53 TWI2-SDA in mraa_banana()
318 b->pins[3].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 }; in mraa_banana()
[all …]
D96boards.c106 b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * b->phy_pin_count); in mraa_96boards()
107 if (b->pins == NULL) { in mraa_96boards()
119 strncpy(b->pins[pin].name, name, MRAA_PIN_NAME_SIZE); in mraa_96boards()
120 b->pins[pin].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; in mraa_96boards()
121 b->pins[pin].gpio.pinmap = pin; in mraa_96boards()
122 b->pins[pin].gpio.mux_total = 0; in mraa_96boards()
/hardware/bsp/intel/peripheral/libmraa/src/x86/
Dintel_galileo_rev_d.c58 int bitpos = plat->pins[dev->phy_pin].mmap.bit_pos; in mraa_intel_galileo_g1_mmap_write()
111 if (mraa_setup_mux_mapped(plat->pins[dev->phy_pin].mmap.gpio) != MRAA_SUCCESS) { in mraa_intel_galileo_g1_mmap_setup()
170 b->pins = (mraa_pininfo_t*) calloc(MRAA_INTEL_GALILEO_REV_D_PINCOUNT, sizeof(mraa_pininfo_t)); in mraa_intel_galileo_rev_d()
171 if (b->pins == NULL) { in mraa_intel_galileo_rev_d()
177 strncpy(b->pins[0].name, "IO0", 8); in mraa_intel_galileo_rev_d()
178 b->pins[0].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }; in mraa_intel_galileo_rev_d()
179 b->pins[0].gpio.pinmap = 50; in mraa_intel_galileo_rev_d()
180 b->pins[0].gpio.parent_id = 0; in mraa_intel_galileo_rev_d()
181 b->pins[0].gpio.mux_total = 1; in mraa_intel_galileo_rev_d()
182 b->pins[0].gpio.mux[0].pin = 40; in mraa_intel_galileo_rev_d()
[all …]
Dintel_galileo_rev_g.c54 if (plat->pins[pin].gpio.complex_cap.complex_pin != 1) in mraa_intel_galileo_gen2_dir_pre()
57 if (plat->pins[pin].gpio.complex_cap.output_en == 1) { in mraa_intel_galileo_gen2_dir_pre()
59 agpioOutputen[pin] = mraa_gpio_init_raw(plat->pins[pin].gpio.output_enable); in mraa_intel_galileo_gen2_dir_pre()
259 int bitpos = plat->pins[dev->phy_pin].mmap.bit_pos; in mraa_intel_galileo_g2_mmap_write()
312 if (mraa_setup_mux_mapped(plat->pins[dev->phy_pin].mmap.gpio) != MRAA_SUCCESS) { in mraa_intel_galileo_g2_mmap_setup()
350 b->pins = (mraa_pininfo_t*) calloc(MRAA_INTEL_GALILEO_GEN_2_PINCOUNT, sizeof(mraa_pininfo_t)); in mraa_intel_galileo_gen2()
351 if (b->pins == NULL) { in mraa_intel_galileo_gen2()
356 strncpy(b->pins[0].name, "IO0", 8); in mraa_intel_galileo_gen2()
357 b->pins[0].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 1, 0, 0, 0, 1 }; in mraa_intel_galileo_gen2()
358 b->pins[0].gpio.pinmap = 11; in mraa_intel_galileo_gen2()
[all …]
Dintel_nuc5.c54 b->pins = (mraa_pininfo_t*) calloc(MRAA_INTEL_NUC5_PINCOUNT,sizeof(mraa_pininfo_t)); in mraa_intel_nuc5()
55 if (b->pins == NULL) { in mraa_intel_nuc5()
60 strncpy(b->pins[0].name, "1.8v", 8); in mraa_intel_nuc5()
61 b->pins[0].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; in mraa_intel_nuc5()
63 strncpy(b->pins[1].name, "GND", 8); in mraa_intel_nuc5()
64 b->pins[1].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; in mraa_intel_nuc5()
65 strncpy(b->pins[2].name, "HDMIcec", 8); in mraa_intel_nuc5()
66 b->pins[2].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; in mraa_intel_nuc5()
67 strncpy(b->pins[3].name, "DMICclk", 8); in mraa_intel_nuc5()
68 b->pins[3].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; in mraa_intel_nuc5()
[all …]
Dintel_de3815.c55 b->pins = (mraa_pininfo_t*) calloc(MRAA_INTEL_DE3815_PINCOUNT,sizeof(mraa_pininfo_t)); in mraa_intel_de3815()
56 if (b->pins == NULL) { in mraa_intel_de3815()
62 free(b->pins); in mraa_intel_de3815()
66 strncpy(b->pins[0].name, "1.8v", 8); in mraa_intel_de3815()
67 b->pins[0].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; in mraa_intel_de3815()
69 strncpy(b->pins[1].name, "GND", 8); in mraa_intel_de3815()
70 b->pins[1].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; in mraa_intel_de3815()
71 strncpy(b->pins[2].name, "HDMIcec", 8); in mraa_intel_de3815()
72 b->pins[2].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; in mraa_intel_de3815()
73 strncpy(b->pins[3].name, "DMICclk", 8); in mraa_intel_de3815()
[all …]
Dintel_edison_fab_c.c258 int scl = plat->pins[plat->i2c_bus[bus].scl].gpio.pinmap; in mraa_intel_edison_i2c_init_pre()
259 int sda = plat->pins[plat->i2c_bus[bus].sda].gpio.pinmap; in mraa_intel_edison_i2c_init_pre()
373 return mraa_intel_edison_pinmode_change(plat->pins[pin].gpio.pinmap, 1); in mraa_intel_edison_pwm_init_pre()
379 if (!plat->pins[pin].capabilites.pwm) { in mraa_intel_edison_pwm_init_pre()
408 mraa_intel_edison_pinmode_change(plat->pins[pin].gpio.pinmap, 1); in mraa_intel_edison_pwm_init_pre()
792 b->pins = (mraa_pininfo_t*) calloc(b->phy_pin_count, sizeof(mraa_pininfo_t)); in mraa_intel_edison_miniboard()
793 if (b->pins == NULL) { in mraa_intel_edison_miniboard()
799 free(b->pins); in mraa_intel_edison_miniboard()
812 strncpy(b->pins[pos].name, "J17-1", 8); in mraa_intel_edison_miniboard()
813 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 }; in mraa_intel_edison_miniboard()
[all …]
Dintel_sofia_3gr.c52 b->pins = (mraa_pininfo_t*) calloc(MRAA_INTEL_SOFIA_3GR_PINCOUNT, sizeof(mraa_pininfo_t)); in mraa_intel_sofia_3gr()
53 if (b->pins == NULL) { in mraa_intel_sofia_3gr()
58 strncpy(b->pins[0].name, "I2C1SCL", 8); in mraa_intel_sofia_3gr()
59 b->pins[0].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 }; in mraa_intel_sofia_3gr()
60 b->pins[0].i2c.pinmap = 1; in mraa_intel_sofia_3gr()
61 b->pins[0].i2c.mux_total = 0; in mraa_intel_sofia_3gr()
63 strncpy(b->pins[1].name, "I2C1SDA", 8); in mraa_intel_sofia_3gr()
64 b->pins[1].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 }; in mraa_intel_sofia_3gr()
65 b->pins[1].i2c.pinmap = 1; in mraa_intel_sofia_3gr()
66 b->pins[1].i2c.mux_total = 0; in mraa_intel_sofia_3gr()
[all …]
Dintel_minnow_byt_compatible.c46 mraa_pininfo_t* pin_info = &board->pins[mraa_index]; in mraa_set_pininfo()
78 if (strncmp(name, board->pins[i].name, MAX_LENGTH) == 0) { in mraa_get_pin_index()
107 b->pins = (mraa_pininfo_t*) calloc(b->phy_pin_count, sizeof(mraa_pininfo_t)); in mraa_intel_minnowboard_byt_compatible()
108 if (b->pins == NULL) { in mraa_intel_minnowboard_byt_compatible()
114 free(b->pins); in mraa_intel_minnowboard_byt_compatible()
119 free(b->pins); in mraa_intel_minnowboard_byt_compatible()
/hardware/bsp/intel/peripheral/libmraa/src/usb/
Dftdi_ft4222.c678 mraa_pininfo_t* pins = (mraa_pininfo_t*) calloc(numUsbPins,sizeof(mraa_pininfo_t)); in mraa_ftdi_ft4222() local
679 if (pins == NULL) { in mraa_ftdi_ft4222()
682 sub_plat->pins = pins; in mraa_ftdi_ft4222()
691 strncpy(sub_plat->pins[pinIndex].name, "IGPIO0/SCL0", MRAA_PIN_NAME_SIZE); in mraa_ftdi_ft4222()
692 sub_plat->pins[pinIndex].capabilites = pinCapsI2cGpio; in mraa_ftdi_ft4222()
693 sub_plat->pins[pinIndex].gpio.pinmap = pinIndex; in mraa_ftdi_ft4222()
694 sub_plat->pins[pinIndex].gpio.mux_total = 0; in mraa_ftdi_ft4222()
695 sub_plat->pins[pinIndex].i2c.mux_total = 0; in mraa_ftdi_ft4222()
698 strncpy(sub_plat->pins[pinIndex].name, "IGPIO1/SDA0", MRAA_PIN_NAME_SIZE); in mraa_ftdi_ft4222()
699 sub_plat->pins[pinIndex].capabilites = pinCapsI2cGpio; in mraa_ftdi_ft4222()
[all …]
/hardware/bsp/intel/peripheral/libmraa/src/
Dmraa.c173 if (plat->pins != NULL) { in mraa_deinit()
174 free(plat->pins); in mraa_deinit()
178 if (sub_plat->pins != NULL) { in mraa_deinit()
179 free(sub_plat->pins); in mraa_deinit()
365 if (current_plat->pins[pin].capabilites.valid == 1) in mraa_pin_mode_test()
369 if (current_plat->pins[pin].capabilites.gpio == 1) in mraa_pin_mode_test()
373 if (current_plat->pins[pin].capabilites.pwm == 1) in mraa_pin_mode_test()
377 if (current_plat->pins[pin].capabilites.fast_gpio == 1) in mraa_pin_mode_test()
381 if (current_plat->pins[pin].capabilites.spi == 1) in mraa_pin_mode_test()
385 if (current_plat->pins[pin].capabilites.i2c == 1) in mraa_pin_mode_test()
[all …]
/hardware/bsp/intel/peripheral/libmraa/src/spi/
Dspi.c82 if (plat->pins[pos].spi.mux_total > 0) { in mraa_spi_init()
83 if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) { in mraa_spi_init()
90 if (plat->pins[pos].spi.mux_total > 0) { in mraa_spi_init()
91 if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) { in mraa_spi_init()
98 if (plat->pins[pos].spi.mux_total > 0) { in mraa_spi_init()
99 if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) { in mraa_spi_init()
106 if (plat->pins[pos].spi.mux_total > 0) { in mraa_spi_init()
107 if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) { in mraa_spi_init()
/hardware/bsp/intel/peripheral/libmraa/src/aio/
Daio.c89 dev->channel = plat->pins[pin].aio.pinmap; in mraa_aio_init()
105 if (plat->pins[pin].capabilites.aio != 1) { in mraa_aio_init()
111 if (plat->pins[pin].aio.mux_total > 0) { in mraa_aio_init()
112 if (mraa_setup_mux_mapped(plat->pins[pin].aio) != MRAA_SUCCESS) { in mraa_aio_init()
/hardware/bsp/intel/peripheral/libmraa/src/pwm/
Dpwm.c189 if (plat->pins[pin].capabilites.pwm != 1) { in mraa_pwm_init()
202 if (plat->pins[pin].capabilites.gpio == 1) { in mraa_pwm_init()
205 mux_i = mraa_gpio_init_raw(plat->pins[pin].gpio.pinmap); in mraa_pwm_init()
224 if (plat->pins[pin].pwm.mux_total > 0) { in mraa_pwm_init()
225 if (mraa_setup_mux_mapped(plat->pins[pin].pwm) != MRAA_SUCCESS) { in mraa_pwm_init()
231 int chip = plat->pins[pin].pwm.parent_id; in mraa_pwm_init()
232 int pinn = plat->pins[pin].pwm.pinmap; in mraa_pwm_init()
/hardware/bsp/intel/peripheral/libmraa/src/i2c/
Di2c.c166 if (board->pins[pos].i2c.mux_total > 0) { in mraa_i2c_init()
167 if (mraa_setup_mux_mapped(board->pins[pos].i2c) != MRAA_SUCCESS) { in mraa_i2c_init()
174 if (board->pins[pos].i2c.mux_total > 0) { in mraa_i2c_init()
175 if (mraa_setup_mux_mapped(board->pins[pos].i2c) != MRAA_SUCCESS) { in mraa_i2c_init()
/hardware/bsp/intel/peripheral/libmraa/src/uart/
Duart.c158 if (plat->pins[pos].uart.mux_total > 0) { in mraa_uart_init()
159 if (mraa_setup_mux_mapped(plat->pins[pos].uart) != MRAA_SUCCESS) { in mraa_uart_init()
168 if (plat->pins[pos].uart.mux_total > 0) { in mraa_uart_init()
169 if (mraa_setup_mux_mapped(plat->pins[pos].uart) != MRAA_SUCCESS) { in mraa_uart_init()
/hardware/bsp/intel/peripheral/libmraa/docs/
Dgalileorevd.md13 - AIO pins are treated as 0-5 in mraa_aio_init() but as 14-19 for everything
Dedison.md30 - AIO pins are treated as 0-5 in `mraa_aio_init()` but as 14-19 for everything
40 IO will be flipped as it is setup. It's recommended to setup IO pins &
51 Please see the following table on how the physical pins map to mraa pin numbers
Dftdi_ft4222.md34 When an I2C GPIO expander is present, the pins on the expander will appear after
35 the 4 FT4222H GPIO pins (i.e. starting at physical pin #4, logical pin #516).
Dintel_nuc5.md15 Select I2c under GPIO for the 12/13 14/15 pins
/hardware/bsp/intel/peripheral/libmraa/src/python/docs/
Dexample.rst25 platforms will not support interupts on all pins so please check your return
78 It allows the exposure of UART pins on supported boards, with basic
/hardware/bsp/intel/peripheral/libmraa/src/gpio/
Dgpio.c152 if (board->pins[pin].capabilites.gpio != 1) { in mraa_gpio_init()
156 if (board->pins[pin].gpio.mux_total > 0) { in mraa_gpio_init()
157 if (mraa_setup_mux_mapped(board->pins[pin].gpio) != MRAA_SUCCESS) { in mraa_gpio_init()
163 mraa_gpio_context r = mraa_gpio_init_internal(board->adv_func, board->pins[pin].gpio.pinmap); in mraa_gpio_init()
/hardware/bsp/intel/peripheral/libmraa/include/
Dmraa_internal_types.h289 mraa_pininfo_t* pins; /**< Pointer to pin array */ member

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