/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/ppc/ |
D | platform_altivec.asm | 25 ;# r3 context_ptr 28 W v20, r3 29 W v21, r3 30 W v22, r3 31 W v23, r3 32 W v24, r3 33 W v25, r3 34 W v26, r3 35 W v27, r3 36 W v28, r3 [all …]
|
D | variance_altivec.asm | 75 load_aligned_16 v4, r3, r10 79 add r3, r3, r4 90 lwz r3, 12(r1) 96 stw r3, 0(r8) ;# sum 100 mullw r3, r3, r3 ;# sum*sum 101 srlwi r3, r3, \DS ;# (sum*sum) >> DS 102 subf r3, r3, r4 ;# sse - ((sum*sum) >> DS) 108 load_aligned_16 v4, r3, r10 112 add r3, r3, r4 116 load_aligned_16 v6, r3, r10 [all …]
|
D | sad_altivec.asm | 59 lvx v4, 0, r3 64 add r3, r3, r4 75 lvx v9, 0, r3 81 add r3, r3, r4 89 lvx v4, 0, r3 97 add r3, r3, r4 109 lwz r3, 12(r1) 116 load_aligned_16 v4, r3, r10 120 add r3, r3, r4 124 load_aligned_16 v6, r3, r10 [all …]
|
D | filter_altivec.asm | 32 load_c v0, VFilter, r6, r3, r10 191 ;# r3 unsigned char * src 417 addi r3, r3, -2 419 addi r9, r3, 0 421 Read8x8 v2, r3, r4, 1 422 Read8x8 v3, r3, r4, 1 423 Read8x8 v4, r3, r4, 1 424 Read8x8 v5, r3, r4, 1 447 Read8x8 v6, r3, r4, 1 448 Read8x8 v7, r3, r4, 1 [all …]
|
D | recon_altivec.asm | 33 ;# r3 = short *diff_ptr, 46 row_of16 r3, r4, r5, r6 47 row_of16 r3, r4, r5, r6 48 row_of16 r3, r4, r5, r6 49 row_of16 r3, r4, r5, r6 81 ;# r3 = short *diff_ptr, 97 two_rows_of8 r3, r4, r5, r6, 1 100 addi r3, r3, 32; ;# next diff 102 two_rows_of8 r3, r4, r5, r6, 0 111 lwz r0, 4(r3) [all …]
|
D | copy_altivec.asm | 14 ;# r3 unsigned char *src 31 lvsl v0, 0, r3 ;# permutate value for alignment 33 lvx v1, 0, r3 34 lvx v2, r10, r3 40 add r3, r3, r4 ;# increment source pointer
|
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/neon/ |
D | sad8_neon.asm | 29 vld1.8 {d8}, [r2], r3 32 vld1.8 {d10}, [r2], r3 37 vld1.8 {d12}, [r2], r3 42 vld1.8 {d14}, [r2], r3 47 vld1.8 {d8}, [r2], r3 52 vld1.8 {d10}, [r2], r3 57 vld1.8 {d12}, [r2], r3 62 vld1.8 {d14}, [r2], r3 86 vld1.8 {d8}, [r2], r3 89 vld1.8 {d10}, [r2], r3 [all …]
|
D | idct_dequant_0_2x_neon.asm | 22 ; r3 stride 27 vld1.32 {d2[0]}, [r2], r3 28 vld1.32 {d8[0]}, [r12], r3 29 vld1.32 {d2[1]}, [r2], r3 30 vld1.32 {d8[1]}, [r12], r3 31 vld1.32 {d4[0]}, [r2], r3 32 vld1.32 {d10[0]}, [r12], r3 33 vld1.32 {d4[1]}, [r2], r3 34 vld1.32 {d10[1]}, [r12], r3 58 sub r2, r2, r3, lsl #2 ; dst - 4*stride [all …]
|
D | sad16_neon.asm | 24 ; r3 int ref_stride 28 vld1.8 {q4}, [r2], r3 31 vld1.8 {q5}, [r2], r3 37 vld1.8 {q6}, [r2], r3 43 vld1.8 {q7}, [r2], r3 50 vld1.8 {q4}, [r2], r3 56 vld1.8 {q5}, [r2], r3 62 vld1.8 {q6}, [r2], r3 68 vld1.8 {q7}, [r2], r3 75 vld1.8 {q4}, [r2], r3 [all …]
|
D | buildintrapredictorsmby_neon.asm | 23 ; r3 int mode 30 cmp r3, #0 32 cmp r3, #1 34 cmp r3, #2 36 cmp r3, #3 79 ldrb r3, [r0], r2 84 add r12, r12, r3 89 ldrb r3, [r0], r2 94 add r12, r12, r3 99 ldrb r3, [r0], r2 [all …]
|
D | loopfiltersimpleverticaledge_neon.asm | 27 add r3, r0, r1 30 vld4.8 {d6[1], d7[1], d8[1], d9[1]}, [r3], r12 32 vld4.8 {d6[3], d7[3], d8[3], d9[3]}, [r3], r12 34 vld4.8 {d6[5], d7[5], d8[5], d9[5]}, [r3], r12 36 vld4.8 {d6[7], d7[7], d8[7], d9[7]}, [r3], r12 39 vld4.8 {d10[1], d11[1], d12[1], d13[1]}, [r3], r12 41 vld4.8 {d10[3], d11[3], d12[3], d13[3]}, [r3], r12 43 vld4.8 {d10[5], d11[5], d12[5], d13[5]}, [r3], r12 45 vld4.8 {d10[7], d11[7], d12[7], d13[7]}, [r3] 87 add r3, r0, r1 [all …]
|
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/arm/neon/ |
D | vp9_avg_neon.asm | 33 sub r4, r3, #32 38 pld [r2, r3] 54 vld1.8 {q8-q9}, [r6@128], r3 55 vld1.8 {q10-q11}, [r6@128], r3 62 pld [r6, r3] 64 vst1.8 {q0-q1}, [r2@128], r3 65 vst1.8 {q2-q3}, [r2@128], r3 73 vld1.8 {q2}, [r6@128], r3 74 vld1.8 {q3}, [r6@128], r3 79 pld [r6, r3] [all …]
|
D | vp9_convolve8_avg_neon.asm | 46 ; r3 int dst_stride 72 sub r4, r3, r3, lsl #2 ; -dst_stride * 3 77 rsb r12, r6, r3, lsl #2 ; reset dst for outer loop 129 vld1.u32 {d6[0]}, [r2], r3 130 vld1.u32 {d7[0]}, [r2], r3 131 vld1.u32 {d6[1]}, [r2], r3 132 vld1.u32 {d7[1]}, [r2], r3 134 sub r2, r2, r3, lsl #2 ; reset for store 162 vst1.u32 {d2[0]}, [r2@32], r3 163 vst1.u32 {d3[0]}, [r2@32], r3 [all …]
|
D | vp9_copy_neon.asm | 32 sub r3, r3, #32 38 vst1.8 {q2-q3}, [r2@128], r3 48 vst1.8 {q0-q1}, [r2@128], r3 49 vst1.8 {q2-q3}, [r2@128], r3 59 vst1.8 {q0}, [r2@128], r3 60 vst1.8 {q1}, [r2@128], r3 70 vst1.8 {d0}, [r2@64], r3 71 vst1.8 {d2}, [r2@64], r3 78 str r12, [r2], r3
|
D | vp9_idct16x16_add_neon.asm | 64 mov r3, #0xc00 65 add r3, #0x7c 75 vdup.16 d0, r3 ; duplicate cospi_28_64 80 mov r3, #0x3500 81 add r3, #0x37 103 vdup.16 d2, r3 ; duplicate cospi_12_64 116 mov r3, #0x2d00 117 add r3, #0x41 148 vdup.16 d30, r3 ; cospi_16_64 159 mov r3, #0x3b00 [all …]
|
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/armv6/ |
D | simpleloopfilter_v6.asm | 62 ldr r3, [src, -pstep, lsl #1] ; p1 173 pkhbt r9, r3, r4, lsl #16 176 ;transpose r7, r8, r9, r10 to r3, r4, r5, r6 177 TRANSPOSE_MATRIX r7, r8, r9, r10, r3, r4, r5, r6 179 uqsub8 r7, r3, r6 ; p1 - q1 180 uqsub8 r8, r6, r3 ; q1 - p1 198 eor r3, r3, r2 ; p1 offset to convert to a signed value 203 qsub8 r3, r3, r6 ; vp8_filter = p1 - q1 206 qadd8 r3, r3, r6 ; vp8_filter += q0 - p0 209 qadd8 r3, r3, r6 ; vp8_filter += q0 - p0 [all …]
|
D | iwalsh_v6.asm | 25 ldr r3, [r0, #4] ; [3 | 2] 43 qadd16 r10, r3, r9 ; a1 [3+15 | 2+14] 46 qsub16 lr, r3, r9 ; d1 [3-15 | 2-14] 48 qadd16 r3, r10, r11 ; a1 + b1 [3 | 2] 55 qsubaddx r10, r2, r3 ; [c1|a1] [1-2 | 0+3] 56 qaddsubx r11, r2, r3 ; [b1|d1] [1+2 | 0-3] 61 qaddsubx r3, r11, r10 ; [a2|d2] [b1+a1 | d1-c1] 67 qadd16 r3, r3, r10 ; [a2+3|d2+3] 71 asr r12, r3, #19 ; [0] 76 sxth r3, r3 [all …]
|
D | intra4x4_predict_v6.asm | 29 ; r3: b_mode 36 cmp r3, #10 37 addlt pc, pc, r3, lsl #2 ; position independent switch 70 ldr r3, [sp, #40] ; dst 74 str r12, [r3], r0 75 str r12, [r3], r0 76 str r12, [r3], r0 77 str r12, [r3] 89 ldr r3, [sp, #40] ; dst 111 str r12, [r3], r0 [all …]
|
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/arm/neon/ |
D | subtract_neon.asm | 28 ldr r3, [r0, #vp8_block_base_src] 31 ldr r3, [r3] 33 add r3, r3, r4 ; src = *base_src + src 36 vld1.8 {d0}, [r3], r6 ;load src 38 vld1.8 {d2}, [r3], r6 40 vld1.8 {d4}, [r3], r6 42 vld1.8 {d6}, [r3], r6 75 vld1.8 {q1}, [r3], r4 ;load pred 77 vld1.8 {q3}, [r3], r4 79 vld1.8 {q5}, [r3], r4 [all …]
|
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vpx_scale/arm/neon/ |
D | vp8_vpxyv12_copysrcframe_func_neon.asm | 37 ldr r3, [r1, #yv12_buffer_config_y_buffer] ;dstptr1 40 add r11, r3, r7 ;second row dst 63 vst1.8 {q0, q1}, [r3]! 65 vst1.8 {q2, q3}, [r3]! 67 vst1.8 {q8, q9}, [r3]! 69 vst1.8 {q10, q11}, [r3]! 81 vst1.8 {d0}, [r3]! 91 strb r8, [r3], #1 99 add r3, r3, r7 116 vst1.8 {q0, q1}, [r3]! [all …]
|
D | vp8_vpxyv12_copyframe_func_neon.asm | 41 ldr r3, [r1, #yv12_buffer_config_y_buffer] ;dstptr1 53 mov r9, r3 55 add r11, r3, r7 84 add r3, r3, r7, lsl #1 92 ldr r3, [r1, #yv12_buffer_config_y_buffer] ;dstptr1 98 ldr r3, [sp, #4] ;dstptr1 113 mov r9, r3 115 add r11, r3, r7 136 add r3, r3, r7, lsl #1 144 ldr r3, [sp, #4] ;dstptr1 [all …]
|
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/ppc/ |
D | encodemb_altivec.asm | 15 ;# r3 short *diff 26 add r3, r3, r9 27 add r3, r3, r9 56 stvx v3, 0, r3 ;# store out diff 65 stvx v3, r10, r3 ;# store out diff 67 addi r3, r3, 32 93 stvx v3, 0, r3 ;# store out diff 102 stvx v3, r10, r3 ;# store out diff 104 addi r3, r3, 32 112 ;# r3 short *diff [all …]
|
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/arm/armv6/ |
D | vp8_fast_quantize_b_armv6.asm | 27 ldr r3, [r0, #vp8_block_coeff] ; coeff 43 ldr r9, [r3], #4 ; [z1 | z0] 52 ldr r12, [r3], #4 ; [z3 | z2] 57 ldr r10, [r5], #4 ; [r3 | r2] 65 sadd16 r12, r12, r10 ; [x3+r3 | x2+r2] 70 smultt r12, r12, r9 ; [(x3+r3)*q3] 136 ldrh r3, [r0, #28] ; rc=14, i=14 138 cmp r3, #0 148 ldrh r3, [r0, #14] ; rc=7, i=12 150 cmp r3, #0 [all …]
|
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/arm/armv5te/ |
D | boolhuff_armv5te.asm | 31 push {r0-r3, r12, lr} ; rest of regs are preserved by subroutine call 33 ldr r3, [r0, #vp8_writer_error] 37 pop {r0-r3, r12, lr} 46 mov r3, #255 49 str r3, [r0, #vp8_writer_range] 66 ldr r3, [r0, #vp8_writer_count] 85 adds r3, r3, r6 ; count += shift 89 sub r6, r6, r3 ; offset = shift - count 118 mov r6, r3 ; shift = count 122 sub r3, r3, #8 ; count -= 8 [all …]
|
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/mips/dspr2/ |
D | vp9_loopfilter_masks_dspr2.h | 34 uint32_t c, r, r3, r_k; in vp9_filter_hev_mask_dspr2() local 92 [r] "=&r" (r), [r3] "=&r" (r3) in vp9_filter_hev_mask_dspr2() 124 : [p0] "r" (p0), [q0] "r" (q0), [p1] "r" (p1), [r3] "r" (r3), in vp9_filter_hev_mask_dspr2() 142 uint32_t c, r, r3, r_k, r_flat; in vp9_filter_hev_mask_flatmask4_dspr2() local 239 : [c] "=&r" (c), [r_k] "=&r" (r_k), [r] "=&r" (r), [r3] "=&r" (r3), in vp9_filter_hev_mask_flatmask4_dspr2() 273 : [p0] "r" (p0), [q0] "r" (q0), [p1] "r" (p1), [r3] "r" (r3), in vp9_filter_hev_mask_flatmask4_dspr2()
|