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/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/arm/armv5te/
Dvp8_packtokens_armv5.asm46 push {r4-r12, lr}
61 ldr r4, [sp, #8] ; vp8_coef_encodings
63 add r4, r4, r6, lsl #3 ; a = vp8_coef_encodings + t
68 ldr r6, [r4, #vp8_token_value] ; v
69 ldr r8, [r4, #vp8_token_len] ; n
76 rsb r4, r8, #32 ; 32-n
80 lsl r12, r6, r4 ; r12 = v << 32 - n
84 ldrb r4, [r9, lr, asr #1] ; pp [i>>1]
91 mul r6, r4, r7 ; ((range-1) * pp[i>>1]))
99 add r4, r7, r6, lsr #8 ; 1 + (((range-1) * pp[i>>1]) >> 8)
[all …]
Dvp8_packtokens_mbrow_armv5.asm45 push {r4-r12, lr}
49 ldr r4, _VP8_COMP_common_
51 add r4, r0, r4
53 ldr r5, [r4, r6] ; load up mb_rows
59 ldr r4, _VP8_COMP_tplist_
60 add r4, r0, r4
61 ldr r7, [r4, #0] ; dereference cpi->tp_list
82 ldr r4, [sp, #20] ; vp8_coef_encodings
84 add r4, r4, r6, lsl #3 ; a = vp8_coef_encodings + t
89 ldr r6, [r4, #vp8_token_value] ; v
[all …]
Dvp8_packtokens_partitions_armv5.asm46 push {r4-r12, lr}
50 ldr r4, _VP8_COMP_common_
52 add r4, r0, r4
54 ldr r5, [r4, r6] ; load up mb_rows
61 ldr r4, _VP8_COMP_tplist_
62 add r4, r0, r4
63 ldr r7, [r4, #0] ; dereference cpi->tp_list
111 ldr r4, [sp, #80] ; vp8_coef_encodings
113 add r4, r4, r6, lsl #3 ; a = vp8_coef_encodings + t
118 ldr r6, [r4, #vp8_token_value] ; v
[all …]
Dboolhuff_armv5te.asm60 push {r4-r10, lr}
62 mov r4, r2
71 mul r6, r4, r7 ; ((range-1) * probability)
74 add r4, r7, r6, lsr #8 ; 1 + (((range-1) * probability) >> 8)
76 addne r2, r2, r4 ; if (bit) lowvalue += split
77 subne r4, r5, r4 ; if (bit) range = range-split
80 clz r6, r4
86 lsl r5, r4, r6 ; range <<= shift
90 sub r4, r6, #1 ; offset-1
91 lsls r4, r2, r4 ; if((lowvalue<<(offset-1)) & 0x80000000 )
[all …]
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/armv6/
Dcopymem8x8_v6.asm21 ;push {r4-r5}
22 stmdb sp!, {r4-r5}
29 ands r4, r0, #7
32 ands r4, r0, #3
36 ldrb r4, [r0]
42 strb r4, [r2]
45 ldrb r4, [r0, #2]
50 strb r4, [r2, #2]
53 ldrb r4, [r0, #4]
56 strb r4, [r2, #4]
[all …]
Dcopymem8x4_v6.asm21 ;push {r4-r5}
22 stmdb sp!, {r4-r5}
29 ands r4, r0, #7
32 ands r4, r0, #3
36 ldrb r4, [r0]
42 strb r4, [r2]
45 ldrb r4, [r0, #2]
50 strb r4, [r2, #2]
53 ldrb r4, [r0, #4]
56 strb r4, [r2, #4]
[all …]
Dcopymem16x16_v6.asm21 stmdb sp!, {r4 - r7}
22 ;push {r4-r7}
27 ands r4, r0, #15
30 ands r4, r0, #7
33 ands r4, r0, #3
37 ldrb r4, [r0]
45 strb r4, [r2]
50 ldrb r4, [r0, #4]
57 strb r4, [r2, #4]
62 ldrb r4, [r0, #8]
[all …]
Dintra4x4_predict_v6.asm34 push {r4-r12, lr}
38 pop {r4-r12, pc} ; default
53 ldrb r4, [r1], r2 ; Left[0]
61 add r4, r4, r5
62 add r4, r4, r6
63 add r4, r4, r7
64 add r4, r4, r12
65 add r4, r4, #4
67 mov r12, r4, asr #3 ; (expected_dc + 4) >> 3
79 pop {r4-r12, pc}
[all …]
Dvp8_variance_halfpixvar16x16_hv_armv6.asm27 stmfd sp!, {r4-r12, lr}
40 ldr r4, [r0, #0] ; load source pixels a, row N
47 uhsub8 r4, r4, r6
48 eor r4, r4, r10
55 uhsub8 r4, r4, r5
57 eor r4, r4, r10
59 usub8 r6, r4, r5 ; calculate difference
62 usub8 r6, r5, r4 ; calculate difference with reversed operands
67 usad8 r4, r7, lr ; calculate sum of positive differences
71 adds r8, r8, r4 ; add positive differences to sum
[all …]
Ddc_only_idct_add_v6.asm24 stmdb sp!, {r4 - r7}
28 ldr r4, [r1], r2
35 uxtab16 r5, r0, r4 ; a1+2 | a1+0
36 uxtab16 r4, r0, r4, ror #8 ; a1+3 | a1+1
40 usat16 r4, #8, r4
43 orr r5, r5, r4, lsl #8
45 ldr r4, [r1], r2
50 uxtab16 r5, r0, r4
51 uxtab16 r4, r0, r4, ror #8
55 usat16 r4, #8, r4
[all …]
Dvp8_variance_halfpixvar16x16_h_armv6.asm27 stmfd sp!, {r4-r12, lr}
39 ldr r4, [r0, #0] ; load 4 src pixels
45 uhsub8 r4, r4, r6
46 eor r4, r4, r10
48 usub8 r6, r4, r5 ; calculate difference
51 usub8 r6, r5, r4 ; calculate difference with reversed operands
56 usad8 r4, r7, lr ; calculate sum of positive differences
60 adds r8, r8, r4 ; add positive differences to sum
69 ldr r4, [r0, #4] ; load 4 src pixels
75 uhsub8 r4, r4, r6
[all …]
Dvp8_variance_halfpixvar16x16_v_armv6.asm27 stmfd sp!, {r4-r12, lr}
40 ldr r4, [r0, #0] ; load 4 src pixels
46 uhsub8 r4, r4, r6
47 eor r4, r4, r10
49 usub8 r6, r4, r5 ; calculate difference
52 usub8 r6, r5, r4 ; calculate difference with reversed operands
57 usad8 r4, r7, lr ; calculate sum of positive differences
61 adds r8, r8, r4 ; add positive differences to sum
70 ldr r4, [r0, #4] ; load 4 src pixels
76 uhsub8 r4, r4, r6
[all …]
Dsimpleloopfilter_v6.asm59 stmdb sp!, {r4 - r11, lr}
63 ldr r4, [src, -pstep] ; p0
173 pkhbt r9, r3, r4, lsl #16
176 ;transpose r7, r8, r9, r10 to r3, r4, r5, r6
177 TRANSPOSE_MATRIX r7, r8, r9, r10, r3, r4, r5, r6
181 uqsub8 r9, r4, r5 ; p0 - q0
182 uqsub8 r10, r5, r4 ; q0 - p0
200 eor r4, r4, r2 ; p0 offset to convert to a signed value
204 qsub8 r6, r5, r4 ; q0 - p0
229 qadd8 r4, r4, r9 ; u = p0 + Filter2
[all …]
Diwalsh_v6.asm22 stmdb sp!, {r4 - r12, lr}
26 ldr r4, [r0, #8] ; [5 | 4]
34 qadd16 r11, r4, r6 ; b1 [5+9 | 4+8]
35 qsub16 r12, r4, r6 ; c1 [5-9 | 4-8]
39 qadd16 r4, r12, lr ; c1 + d1 [5 | 4]
57 qsubaddx r12, r4, r5 ; [c1|a1] [5-6 | 4+7]
58 qaddsubx lr, r4, r5 ; [b1|d1] [5+6 | 4-7]
63 qaddsubx r4, r12, lr ; [b2|c2] [c1+d1 | a1-b1]
68 qadd16 r4, r4, r10 ; [b2+3|c2+3]
84 asr lr, r4, #19 ; [5]
[all …]
Dvp8_sad16x16_armv6.asm26 stmfd sp!, {r4-r12, lr}
33 mov r4, #0 ; sad = 0;
45 usada8 r4, r8, r6, r4 ; calculate sad for 4 pixels
57 usada8 r4, r10, r12, r4 ; calculate sad for 4 pixels
62 add r4, r4, r8 ; add partial sad values
70 usada8 r4, r6, r8, r4 ; calculate sad for 4 pixels
79 usada8 r4, r10, r12, r4 ; calculate sad for 4 pixels
86 add r4, r4, r8 ; add partial sad values
90 mov r0, r4 ; return sad
91 ldmfd sp!, {r4-r12, pc}
Dvp8_variance16x16_armv6.asm27 stmfd sp!, {r4-r12, lr}
38 ldr r4, [r0, #0] ; load 4 src pixels
43 usub8 r6, r4, r5 ; calculate difference
46 usub8 r9, r5, r4 ; calculate difference with reversed operands
51 usad8 r4, r7, lr ; calculate sum of positive differences
55 adds r8, r8, r4 ; add positive differences to sum
64 ldr r4, [r0, #4] ; load 4 src pixels
68 usub8 r6, r4, r5 ; calculate difference
70 usub8 r9, r5, r4 ; calculate difference with reversed operands
74 usad8 r4, r7, lr ; calculate sum of positive differences
[all …]
Ddequantize_v6.asm21 stmdb sp!, {r4-r9, lr}
24 ldr r4, [r1] ;load DQC
31 smulbb r7, r3, r4 ;multiply
32 smultt r8, r3, r4
37 ldr r4, [r1, #8]
42 smulbb r7, r3, r4 ;multiply
44 smultt r8, r3, r4
57 ldrne r4, [r1]
66 ldmia sp!, {r4-r9, pc}
Ddequant_idct_v6.asm21 stmdb sp!, {r4-r11, lr}
23 ldr r4, [r0] ;input
32 smulbb r6, r4, r5
33 smultt r7, r4, r5
35 ldr r4, [r0, #4] ;input
41 smulbb r6, r4, r5
42 smultt r7, r4, r5
46 ldrne r4, [r0, #4]
59 ldr r4, sinpi8sqrt2
67 smulwt r10, r4, r6
[all …]
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/neon/
Dbuildintrapredictorsmby_neon.asm28 push {r4-r8, lr}
40 ldr r4, [sp, #24] ; Up
51 adds r7, r4, r5
55 cmp r4, #0
64 vmov.32 r4, d8[0]
67 add r12, r4, r6
80 ldrb r4, [r0], r2
85 add r12, r12, r4
90 ldrb r4, [r0], r2
95 add r12, r12, r4
[all …]
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/arm/armv6/
Dvp8_short_fdct4x4_armv6.asm21 stmfd sp!, {r4 - r12, lr}
26 ldrd r4, r5, [r0] ; [i1 | i0] [i3 | i2]
34 qadd16 r6, r4, r5 ; [i1+i2 | i0+i3] = [b1 | a1] without shift
35 qsub16 r7, r4, r5 ; [i1-i2 | i0-i3] = [c1 | d1] without shift
43 smuad r4, r6, lr ; o0 = (i1+i2)*8 + (i0+i3)*8
51 pkhbt r3, r4, r6, lsl #4 ; [o1 | o0], keep in register for PART 2
74 ldrd r4, r5, [r0] ; [i9 | i8] [i11 | i10]
84 qadd16 r6, r4, r5 ; [i9+i10 | i8+i11]=[b1 | a1] without shift
85 qsub16 r7, r4, r5 ; [i9-i10 | i8-i11]=[c1 | d1] without shift
99 ldrd r4, r5, [r0] ; [i13 | i12] [i15 | i14]
[all …]
Dvp8_mse16x16_armv6.asm29 push {r4-r9, lr}
35 mov r4, #0 ; initialize sse = 0
61 smlad r4, r6, r6, r4 ; dual signed multiply, add and accumulate (1)
65 smlad r4, r7, r7, r4 ; dual signed multiply, add and accumulate (2)
80 smlad r4, r6, r6, r4 ; dual signed multiply, add and accumulate (1)
84 smlad r4, r7, r7, r4 ; dual signed multiply, add and accumulate (2)
101 smlad r4, r6, r6, r4 ; dual signed multiply, add and accumulate (1)
105 smlad r4, r7, r7, r4 ; dual signed multiply, add and accumulate (2)
124 smlad r4, r6, r6, r4 ; dual signed multiply, add and accumulate (1)
125 smlad r4, r7, r7, r4 ; dual signed multiply, add and accumulate (2)
[all …]
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/arm/neon/
Dsubtract_neon.asm26 stmfd sp!, {r4-r7}
29 ldr r4, [r0, #vp8_block_src]
33 add r3, r3, r4 ; src = *base_src + src
57 ldmfd sp!, {r4-r7}
67 push {r4-r7}
69 ldr r4, [sp, #16] ; pred_stride
75 vld1.8 {q1}, [r3], r4 ;load pred
77 vld1.8 {q3}, [r3], r4
79 vld1.8 {q5}, [r3], r4
81 vld1.8 {q7}, [r3], r4
[all …]
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/ppc/
Dencodemb_altivec.asm16 ;# r4 unsigned char *usrc
37 lvsl v5, 0, r4 ;# permutate value for alignment
38 lvx v1, 0, r4 ;# src
41 add r4, r4, r7
49 lvsl v5, 0, r4 ;# permutate value for alignment
50 lvx v1, 0, r4 ;# src
52 add r4, r4, r7
113 ;# r4 unsigned char *src
127 lvx v1, 0, r4 ;# src
130 add r4, r4, r6
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/ppc/
Dvariance_altivec.asm79 add r3, r3, r4
93 lwz r4, 12(r1)
98 stw r4, 0(r7) ;# sse
102 subf r3, r3, r4 ;# sse - ((sum*sum) >> DS)
112 add r3, r3, r4
120 add r3, r3, r4
137 lwz r4, 12(r1)
142 stw r4, 0(r7) ;# sse
146 subf r3, r3, r4 ;# sse - ((sum*sum) >> 8)
151 ;# r4 int source_stride
[all …]
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/arm/neon/
Dvp9_avg_neon.asm19 push {r4-r6, lr}
20 ldrd r4, r5, [sp, #32]
23 cmp r4, #32
26 cmp r4, #8
33 sub r4, r3, #32
40 vld1.8 {q10-q11}, [r6@128], r4
46 vst1.8 {q2-q3}, [r2@128], r4
49 pop {r4-r6, pc}
68 pop {r4-r6, pc}
85 pop {r4-r6, pc}
[all …]

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