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Searched refs:sse2 (Results 1 – 20 of 20) sorted by relevance

/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/encoder/x86/
Dvp9_variance_sse2.c353 DECLS(sse2, sse);
371 unsigned int sse2; \
375 h, &sse2); \
377 sse += sse2; \
382 h, &sse2); \
384 sse += sse2; \
388 h, &sse2); \
390 sse += sse2; \
412 FNS(sse2, sse);
432 DECLS(sse2, sse);
[all …]
Dvp9_variance_mmx.c70 unsigned int sse0, sse1, sse2, sse3, var; in vp9_mse16x16_mmx() local
79 ref_ptr + 8 * recon_stride, recon_stride, &sse2, &sum2); in vp9_mse16x16_mmx()
83 var = sse0 + sse1 + sse2 + sse3; in vp9_mse16x16_mmx()
95 unsigned int sse0, sse1, sse2, sse3, var; in vp9_variance16x16_mmx() local
103 ref_ptr + 8 * recon_stride, recon_stride, &sse2, &sum2); in vp9_variance16x16_mmx()
107 var = sse0 + sse1 + sse2 + sse3; in vp9_variance16x16_mmx()
Dvp9_variance_avx2.c198 unsigned int sse2; in vp9_sub_pixel_variance64x64_avx2() local
202 64, &sse2); in vp9_sub_pixel_variance64x64_avx2()
204 sse += sse2; in vp9_sub_pixel_variance64x64_avx2()
239 unsigned int sse2; in vp9_sub_pixel_avg_variance64x64_avx2() local
243 sec + 32, 64, 64, &sse2); in vp9_sub_pixel_avg_variance64x64_avx2()
245 sse += sse2; in vp9_sub_pixel_avg_variance64x64_avx2()
Dvp9_sad_sse2.asm84 INIT_XMM sse2
127 INIT_XMM sse2
173 INIT_XMM sse2
217 INIT_XMM sse2
Dvp9_error_sse2.asm18 INIT_XMM sse2
Dvp9_subtract_sse2.asm20 INIT_XMM sse2
Dvp9_ssim_opt.asm149 ; ( calling app will initialize to 0 ) could easily fit everything in sse2
Dvp9_sad4d_sse2.asm216 INIT_XMM sse2
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/x86/
Dvariance_mmx.c122 unsigned int sse0, sse1, sse2, sse3, var; in vp8_mse16x16_mmx() local
128 …c_ptr + 8 * source_stride, source_stride, ref_ptr + 8 * recon_stride, recon_stride, &sse2, &sum2) ; in vp8_mse16x16_mmx()
131 var = sse0 + sse1 + sse2 + sse3; in vp8_mse16x16_mmx()
144 unsigned int sse0, sse1, sse2, sse3, var; in vp8_variance16x16_mmx() local
150 …c_ptr + 8 * source_stride, source_stride, ref_ptr + 8 * recon_stride, recon_stride, &sse2, &sum2) ; in vp8_variance16x16_mmx()
153 var = sse0 + sse1 + sse2 + sse3; in vp8_variance16x16_mmx()
Drecon_sse2.asm384 %ifidn %1, sse2
400 %ifidn %1, sse2
430 vp8_intra_pred_uv_tm sse2
915 %ifidn %1, sse2
931 %ifidn %1, sse2
967 vp8_intra_pred_y_tm sse2
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/x86/
Dvp9_asm_stubs.c322 FUN_CONV_1D(horiz, x_step_q4, filter_x, h, src, , sse2);
323 FUN_CONV_1D(vert, y_step_q4, filter_y, v, src - src_stride * 3, , sse2);
324 FUN_CONV_1D(avg_horiz, x_step_q4, filter_x, h, src, avg_, sse2);
325 FUN_CONV_1D(avg_vert, y_step_q4, filter_y, v, src - src_stride * 3, avg_, sse2);
337 FUN_CONV_2D(, sse2);
338 FUN_CONV_2D(avg_ , sse2);
Dvp9_intrapred_sse2.asm71 INIT_XMM sse2
103 INIT_XMM sse2
171 INIT_XMM sse2
187 INIT_XMM sse2
238 INIT_XMM sse2
270 INIT_XMM sse2
308 INIT_XMM sse2
Dvp9_copy_sse2.asm16 INIT_XMM sse2
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/test/
Dvariance_test.cc140 unsigned int sse1, sse2; in RefTest() local
144 log2height_, &sse2); in RefTest()
145 EXPECT_EQ(sse1, sse2); in RefTest()
247 unsigned int sse1, sse2; in RefTest() local
252 log2height_, x, y, &sse2); in RefTest()
253 EXPECT_EQ(sse1, sse2) << "at position " << x << ", " << y; in RefTest()
270 unsigned int sse1, sse2; in RefTest() local
276 x, y, &sse2); in RefTest()
277 EXPECT_EQ(sse1, sse2) << "at position " << x << ", " << y; in RefTest()
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/
Drdopt.c478 unsigned int sse2 = 0; in VP8_UVSSE() local
504 mv_col & 7, mv_row & 7, upred_ptr, uv_stride, &sse2); in VP8_UVSSE()
507 sse2 += sse1; in VP8_UVSSE()
512 upred_ptr, uv_stride, &sse2); in VP8_UVSSE()
515 sse2 += sse1; in VP8_UVSSE()
517 return sse2; in VP8_UVSSE()
1800 unsigned int sse2 = VP8_UVSSE(x); in evaluate_inter_mode_rd() local
1801 if (sse2 * 2 < threshold) in evaluate_inter_mode_rd()
1804 rd->distortion2 = sse + sse2; in evaluate_inter_mode_rd()
1809 rd->distortion_uv = sse2; in evaluate_inter_mode_rd()
Dpickinter.c475 unsigned int sse2 = 0; in check_for_encode_breakout() local
477 sse2 = VP8_UVSSE(x); in check_for_encode_breakout()
479 if (sse2 * 2 < x->encode_breakout) in check_for_encode_breakout()
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/x86/
Dssim_opt.asm149 ; ( calling app will initialize to 0 ) could easily fit everything in sse2
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/third_party/x86inc/
Dx86inc.asm689 %if mmsize == 16 && notcpuflag(sse2)
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/build/make/
Dconfigure.sh1110 check_gcc_machine_option sse2
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/
DCHANGELOG360 x86 sse2 temporal filter