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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/
Dx86-64-bundle.d13 *0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
15 *20:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
17 *40:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
19 *60:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
21 *80:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
23 *a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
25 *c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
27 *e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
29 *100:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
31 *120:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
[all …]
Dbundle.d13 *0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
15 *20:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
17 *40:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
19 *60:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
21 *80:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
23 *a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
25 *c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
27 *e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
29 *100:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
31 *120:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
[all …]
Davx512f_vl-opts.s8 vmovapd %xmm5, %xmm6{%k7}{z} # AVX512{F,VL}
9 vmovapd.s %xmm5, %xmm6{%k7}{z} # AVX512{F,VL}
12 vmovapd %xmm5, %xmm6{%k7}{z} # AVX512{F,VL}
13 vmovapd.s %xmm5, %xmm6{%k7}{z} # AVX512{F,VL}
16 vmovapd %ymm5, %ymm6{%k7}{z} # AVX512{F,VL}
17 vmovapd.s %ymm5, %ymm6{%k7}{z} # AVX512{F,VL}
20 vmovapd %ymm5, %ymm6{%k7}{z} # AVX512{F,VL}
21 vmovapd.s %ymm5, %ymm6{%k7}{z} # AVX512{F,VL}
24 vmovaps %xmm5, %xmm6{%k7}{z} # AVX512{F,VL}
25 vmovaps.s %xmm5, %xmm6{%k7}{z} # AVX512{F,VL}
[all …]
Davx512f-opts.s11 vmovapd.s %zmm5, %zmm6{%k7}{z} # AVX512F
12 vmovapd %zmm5, %zmm6{%k7}{z} # AVX512F
17 vmovaps.s %zmm5, %zmm6{%k7}{z} # AVX512F
18 vmovaps %zmm5, %zmm6{%k7}{z} # AVX512F
23 vmovdqa32.s %zmm5, %zmm6{%k7}{z} # AVX512F
24 vmovdqa32 %zmm5, %zmm6{%k7}{z} # AVX512F
29 vmovdqa64.s %zmm5, %zmm6{%k7}{z} # AVX512F
30 vmovdqa64 %zmm5, %zmm6{%k7}{z} # AVX512F
35 vmovdqu32.s %zmm5, %zmm6{%k7}{z} # AVX512F
36 vmovdqu32 %zmm5, %zmm6{%k7}{z} # AVX512F
[all …]
Davx512f_vl-opts-intel.d14 [ ]*[a-f0-9]+:[ ]*62 f1 fd 8f 28 f5[ ]*vmovapd xmm6\{k7\}\{z\},xmm5
15 [ ]*[a-f0-9]+:[ ]*62 f1 fd 8f 29 ee[ ]*vmovapd\.s xmm6\{k7\}\{z\},xmm5
18 [ ]*[a-f0-9]+:[ ]*62 f1 fd 8f 28 f5[ ]*vmovapd xmm6\{k7\}\{z\},xmm5
19 [ ]*[a-f0-9]+:[ ]*62 f1 fd 8f 29 ee[ ]*vmovapd\.s xmm6\{k7\}\{z\},xmm5
22 [ ]*[a-f0-9]+:[ ]*62 f1 fd af 28 f5[ ]*vmovapd ymm6\{k7\}\{z\},ymm5
23 [ ]*[a-f0-9]+:[ ]*62 f1 fd af 29 ee[ ]*vmovapd\.s ymm6\{k7\}\{z\},ymm5
26 [ ]*[a-f0-9]+:[ ]*62 f1 fd af 28 f5[ ]*vmovapd ymm6\{k7\}\{z\},ymm5
27 [ ]*[a-f0-9]+:[ ]*62 f1 fd af 29 ee[ ]*vmovapd\.s ymm6\{k7\}\{z\},ymm5
30 [ ]*[a-f0-9]+:[ ]*62 f1 7c 8f 28 f5[ ]*vmovaps xmm6\{k7\}\{z\},xmm5
31 [ ]*[a-f0-9]+:[ ]*62 f1 7c 8f 29 ee[ ]*vmovaps\.s xmm6\{k7\}\{z\},xmm5
[all …]
Dx86-64-avx512f_vl-opts.s10 vmovapd %xmm29, %xmm30{%k7}{z} # AVX512{F,VL}
11 vmovapd.s %xmm29, %xmm30{%k7}{z} # AVX512{F,VL}
16 vmovapd %xmm29, %xmm30{%k7}{z} # AVX512{F,VL}
17 vmovapd.s %xmm29, %xmm30{%k7}{z} # AVX512{F,VL}
22 vmovapd %ymm29, %ymm30{%k7}{z} # AVX512{F,VL}
23 vmovapd.s %ymm29, %ymm30{%k7}{z} # AVX512{F,VL}
28 vmovapd %ymm29, %ymm30{%k7}{z} # AVX512{F,VL}
29 vmovapd.s %ymm29, %ymm30{%k7}{z} # AVX512{F,VL}
34 vmovaps %xmm29, %xmm30{%k7}{z} # AVX512{F,VL}
35 vmovaps.s %xmm29, %xmm30{%k7}{z} # AVX512{F,VL}
[all …]
Davx512f_vl-opts.d14 [ ]*[a-f0-9]+:[ ]*62 f1 fd 8f 28 f5[ ]*vmovapd %xmm5,%xmm6\{%k7\}\{z\}
15 [ ]*[a-f0-9]+:[ ]*62 f1 fd 8f 29 ee[ ]*vmovapd\.s %xmm5,%xmm6\{%k7\}\{z\}
18 [ ]*[a-f0-9]+:[ ]*62 f1 fd 8f 28 f5[ ]*vmovapd %xmm5,%xmm6\{%k7\}\{z\}
19 [ ]*[a-f0-9]+:[ ]*62 f1 fd 8f 29 ee[ ]*vmovapd\.s %xmm5,%xmm6\{%k7\}\{z\}
22 [ ]*[a-f0-9]+:[ ]*62 f1 fd af 28 f5[ ]*vmovapd %ymm5,%ymm6\{%k7\}\{z\}
23 [ ]*[a-f0-9]+:[ ]*62 f1 fd af 29 ee[ ]*vmovapd\.s %ymm5,%ymm6\{%k7\}\{z\}
26 [ ]*[a-f0-9]+:[ ]*62 f1 fd af 28 f5[ ]*vmovapd %ymm5,%ymm6\{%k7\}\{z\}
27 [ ]*[a-f0-9]+:[ ]*62 f1 fd af 29 ee[ ]*vmovapd\.s %ymm5,%ymm6\{%k7\}\{z\}
30 [ ]*[a-f0-9]+:[ ]*62 f1 7c 8f 28 f5[ ]*vmovaps %xmm5,%xmm6\{%k7\}\{z\}
31 [ ]*[a-f0-9]+:[ ]*62 f1 7c 8f 29 ee[ ]*vmovaps\.s %xmm5,%xmm6\{%k7\}\{z\}
[all …]
Davx512bw_vl-opts.s8 vmovdqu8 %xmm5, %xmm6{%k7}{z} # AVX512{BW,VL}
9 vmovdqu8.s %xmm5, %xmm6{%k7}{z} # AVX512{BW,VL}
12 vmovdqu8 %xmm5, %xmm6{%k7}{z} # AVX512{BW,VL}
13 vmovdqu8.s %xmm5, %xmm6{%k7}{z} # AVX512{BW,VL}
16 vmovdqu8 %ymm5, %ymm6{%k7}{z} # AVX512{BW,VL}
17 vmovdqu8.s %ymm5, %ymm6{%k7}{z} # AVX512{BW,VL}
20 vmovdqu8 %ymm5, %ymm6{%k7}{z} # AVX512{BW,VL}
21 vmovdqu8.s %ymm5, %ymm6{%k7}{z} # AVX512{BW,VL}
24 vmovdqu16 %xmm5, %xmm6{%k7}{z} # AVX512{BW,VL}
25 vmovdqu16.s %xmm5, %xmm6{%k7}{z} # AVX512{BW,VL}
[all …]
Dx86-64-avx512f-opts.s11 vmovapd.s %zmm29, %zmm30{%k7}{z} # AVX512F
12 vmovapd %zmm29, %zmm30{%k7}{z} # AVX512F
17 vmovaps.s %zmm29, %zmm30{%k7}{z} # AVX512F
18 vmovaps %zmm29, %zmm30{%k7}{z} # AVX512F
29 vmovdqa32.s %zmm29, %zmm30{%k7}{z} # AVX512F
30 vmovdqa32 %zmm29, %zmm30{%k7}{z} # AVX512F
35 vmovdqa64.s %zmm29, %zmm30{%k7}{z} # AVX512F
36 vmovdqa64 %zmm29, %zmm30{%k7}{z} # AVX512F
41 vmovdqu32.s %zmm29, %zmm30{%k7}{z} # AVX512F
42 vmovdqu32 %zmm29, %zmm30{%k7}{z} # AVX512F
[all …]
Dx86-64-avx512f_vl-opts-intel.d16 [ ]*[a-f0-9]+:[ ]*62 01 fd 8f 28 f5[ ]*vmovapd xmm30\{k7\}\{z\},xmm29
17 [ ]*[a-f0-9]+:[ ]*62 01 fd 8f 29 ee[ ]*vmovapd\.s xmm30\{k7\}\{z\},xmm29
22 [ ]*[a-f0-9]+:[ ]*62 01 fd 8f 28 f5[ ]*vmovapd xmm30\{k7\}\{z\},xmm29
23 [ ]*[a-f0-9]+:[ ]*62 01 fd 8f 29 ee[ ]*vmovapd\.s xmm30\{k7\}\{z\},xmm29
28 [ ]*[a-f0-9]+:[ ]*62 01 fd af 28 f5[ ]*vmovapd ymm30\{k7\}\{z\},ymm29
29 [ ]*[a-f0-9]+:[ ]*62 01 fd af 29 ee[ ]*vmovapd\.s ymm30\{k7\}\{z\},ymm29
34 [ ]*[a-f0-9]+:[ ]*62 01 fd af 28 f5[ ]*vmovapd ymm30\{k7\}\{z\},ymm29
35 [ ]*[a-f0-9]+:[ ]*62 01 fd af 29 ee[ ]*vmovapd\.s ymm30\{k7\}\{z\},ymm29
40 [ ]*[a-f0-9]+:[ ]*62 01 7c 8f 28 f5[ ]*vmovaps xmm30\{k7\}\{z\},xmm29
41 [ ]*[a-f0-9]+:[ ]*62 01 7c 8f 29 ee[ ]*vmovaps\.s xmm30\{k7\}\{z\},xmm29
[all …]
Dx86-64-avx512f_vl-opts.d16 [ ]*[a-f0-9]+:[ ]*62 01 fd 8f 28 f5[ ]*vmovapd %xmm29,%xmm30\{%k7\}\{z\}
17 [ ]*[a-f0-9]+:[ ]*62 01 fd 8f 29 ee[ ]*vmovapd\.s %xmm29,%xmm30\{%k7\}\{z\}
22 [ ]*[a-f0-9]+:[ ]*62 01 fd 8f 28 f5[ ]*vmovapd %xmm29,%xmm30\{%k7\}\{z\}
23 [ ]*[a-f0-9]+:[ ]*62 01 fd 8f 29 ee[ ]*vmovapd\.s %xmm29,%xmm30\{%k7\}\{z\}
28 [ ]*[a-f0-9]+:[ ]*62 01 fd af 28 f5[ ]*vmovapd %ymm29,%ymm30\{%k7\}\{z\}
29 [ ]*[a-f0-9]+:[ ]*62 01 fd af 29 ee[ ]*vmovapd\.s %ymm29,%ymm30\{%k7\}\{z\}
34 [ ]*[a-f0-9]+:[ ]*62 01 fd af 28 f5[ ]*vmovapd %ymm29,%ymm30\{%k7\}\{z\}
35 [ ]*[a-f0-9]+:[ ]*62 01 fd af 29 ee[ ]*vmovapd\.s %ymm29,%ymm30\{%k7\}\{z\}
40 [ ]*[a-f0-9]+:[ ]*62 01 7c 8f 28 f5[ ]*vmovaps %xmm29,%xmm30\{%k7\}\{z\}
41 [ ]*[a-f0-9]+:[ ]*62 01 7c 8f 29 ee[ ]*vmovaps\.s %xmm29,%xmm30\{%k7\}\{z\}
[all …]
Davx512bw_vl-opts.d14 [ ]*[a-f0-9]+:[ ]*62 f1 7f 8f 6f f5[ ]*vmovdqu8 %xmm5,%xmm6\{%k7\}\{z\}
15 [ ]*[a-f0-9]+:[ ]*62 f1 7f 8f 7f ee[ ]*vmovdqu8\.s %xmm5,%xmm6\{%k7\}\{z\}
18 [ ]*[a-f0-9]+:[ ]*62 f1 7f 8f 6f f5[ ]*vmovdqu8 %xmm5,%xmm6\{%k7\}\{z\}
19 [ ]*[a-f0-9]+:[ ]*62 f1 7f 8f 7f ee[ ]*vmovdqu8\.s %xmm5,%xmm6\{%k7\}\{z\}
22 [ ]*[a-f0-9]+:[ ]*62 f1 7f af 6f f5[ ]*vmovdqu8 %ymm5,%ymm6\{%k7\}\{z\}
23 [ ]*[a-f0-9]+:[ ]*62 f1 7f af 7f ee[ ]*vmovdqu8\.s %ymm5,%ymm6\{%k7\}\{z\}
26 [ ]*[a-f0-9]+:[ ]*62 f1 7f af 6f f5[ ]*vmovdqu8 %ymm5,%ymm6\{%k7\}\{z\}
27 [ ]*[a-f0-9]+:[ ]*62 f1 7f af 7f ee[ ]*vmovdqu8\.s %ymm5,%ymm6\{%k7\}\{z\}
30 [ ]*[a-f0-9]+:[ ]*62 f1 ff 8f 6f f5[ ]*vmovdqu16 %xmm5,%xmm6\{%k7\}\{z\}
31 [ ]*[a-f0-9]+:[ ]*62 f1 ff 8f 7f ee[ ]*vmovdqu16\.s %xmm5,%xmm6\{%k7\}\{z\}
[all …]
Dx86-64-avx512bw_vl-opts.s10 vmovdqu8 %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
11 vmovdqu8.s %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
16 vmovdqu8 %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
17 vmovdqu8.s %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
22 vmovdqu8 %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
23 vmovdqu8.s %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
28 vmovdqu8 %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
29 vmovdqu8.s %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
34 vmovdqu16 %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
35 vmovdqu16.s %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
[all …]
Davx512bw_vl-opts-intel.d14 [ ]*[a-f0-9]+:[ ]*62 f1 7f 8f 6f f5[ ]*vmovdqu8 xmm6\{k7\}\{z\},xmm5
15 [ ]*[a-f0-9]+:[ ]*62 f1 7f 8f 7f ee[ ]*vmovdqu8\.s xmm6\{k7\}\{z\},xmm5
18 [ ]*[a-f0-9]+:[ ]*62 f1 7f 8f 6f f5[ ]*vmovdqu8 xmm6\{k7\}\{z\},xmm5
19 [ ]*[a-f0-9]+:[ ]*62 f1 7f 8f 7f ee[ ]*vmovdqu8\.s xmm6\{k7\}\{z\},xmm5
22 [ ]*[a-f0-9]+:[ ]*62 f1 7f af 6f f5[ ]*vmovdqu8 ymm6\{k7\}\{z\},ymm5
23 [ ]*[a-f0-9]+:[ ]*62 f1 7f af 7f ee[ ]*vmovdqu8\.s ymm6\{k7\}\{z\},ymm5
26 [ ]*[a-f0-9]+:[ ]*62 f1 7f af 6f f5[ ]*vmovdqu8 ymm6\{k7\}\{z\},ymm5
27 [ ]*[a-f0-9]+:[ ]*62 f1 7f af 7f ee[ ]*vmovdqu8\.s ymm6\{k7\}\{z\},ymm5
30 [ ]*[a-f0-9]+:[ ]*62 f1 ff 8f 6f f5[ ]*vmovdqu16 xmm6\{k7\}\{z\},xmm5
31 [ ]*[a-f0-9]+:[ ]*62 f1 ff 8f 7f ee[ ]*vmovdqu16\.s xmm6\{k7\}\{z\},xmm5
[all …]
Davx512bw-opts.s10 vmovdqu8 %zmm5, %zmm6{%k7}{z} # AVX512BW
11 vmovdqu8.s %zmm5, %zmm6{%k7}{z} # AVX512BW
16 vmovdqu8 %zmm5, %zmm6{%k7}{z} # AVX512BW
17 vmovdqu8.s %zmm5, %zmm6{%k7}{z} # AVX512BW
22 vmovdqu16 %zmm5, %zmm6{%k7}{z} # AVX512BW
23 vmovdqu16.s %zmm5, %zmm6{%k7}{z} # AVX512BW
28 vmovdqu16 %zmm5, %zmm6{%k7}{z} # AVX512BW
29 vmovdqu16.s %zmm5, %zmm6{%k7}{z} # AVX512BW
36 vmovdqu8 zmm6{k7}{z}, zmm5 # AVX512BW
37 vmovdqu8.s zmm6{k7}{z}, zmm5 # AVX512BW
[all …]
Dx86-64-avx512f-opts-intel.d16 [ ]*[a-f0-9]+: 62 01 fd cf 29 ee vmovapd.s zmm30\{k7\}\{z\},zmm29
17 [ ]*[a-f0-9]+: 62 01 fd cf 28 f5 vmovapd zmm30\{k7\}\{z\},zmm29
22 [ ]*[a-f0-9]+: 62 01 7c cf 29 ee vmovaps.s zmm30\{k7\}\{z\},zmm29
23 [ ]*[a-f0-9]+: 62 01 7c cf 28 f5 vmovaps zmm30\{k7\}\{z\},zmm29
34 [ ]*[a-f0-9]+: 62 01 7d cf 7f ee vmovdqa32.s zmm30\{k7\}\{z\},zmm29
35 [ ]*[a-f0-9]+: 62 01 7d cf 6f f5 vmovdqa32 zmm30\{k7\}\{z\},zmm29
40 [ ]*[a-f0-9]+: 62 01 fd cf 7f ee vmovdqa64.s zmm30\{k7\}\{z\},zmm29
41 [ ]*[a-f0-9]+: 62 01 fd cf 6f f5 vmovdqa64 zmm30\{k7\}\{z\},zmm29
46 [ ]*[a-f0-9]+: 62 01 7e cf 7f ee vmovdqu32.s zmm30\{k7\}\{z\},zmm29
47 [ ]*[a-f0-9]+: 62 01 7e cf 6f f5 vmovdqu32 zmm30\{k7\}\{z\},zmm29
[all …]
Davx512f-opts.d15 [ ]*[a-f0-9]+: 62 f1 fd cf 29 ee vmovapd.s %zmm5,%zmm6\{%k7\}\{z\}
16 [ ]*[a-f0-9]+: 62 f1 fd cf 28 f5 vmovapd %zmm5,%zmm6\{%k7\}\{z\}
21 [ ]*[a-f0-9]+: 62 f1 7c cf 29 ee vmovaps.s %zmm5,%zmm6\{%k7\}\{z\}
22 [ ]*[a-f0-9]+: 62 f1 7c cf 28 f5 vmovaps %zmm5,%zmm6\{%k7\}\{z\}
27 [ ]*[a-f0-9]+: 62 f1 7d cf 7f ee vmovdqa32.s %zmm5,%zmm6\{%k7\}\{z\}
28 [ ]*[a-f0-9]+: 62 f1 7d cf 6f f5 vmovdqa32 %zmm5,%zmm6\{%k7\}\{z\}
33 [ ]*[a-f0-9]+: 62 f1 fd cf 7f ee vmovdqa64.s %zmm5,%zmm6\{%k7\}\{z\}
34 [ ]*[a-f0-9]+: 62 f1 fd cf 6f f5 vmovdqa64 %zmm5,%zmm6\{%k7\}\{z\}
39 [ ]*[a-f0-9]+: 62 f1 7e cf 7f ee vmovdqu32.s %zmm5,%zmm6\{%k7\}\{z\}
40 [ ]*[a-f0-9]+: 62 f1 7e cf 6f f5 vmovdqu32 %zmm5,%zmm6\{%k7\}\{z\}
[all …]
Davx512f-opts-intel.d16 [ ]*[a-f0-9]+: 62 f1 fd cf 29 ee vmovapd.s zmm6\{k7\}\{z\},zmm5
17 [ ]*[a-f0-9]+: 62 f1 fd cf 28 f5 vmovapd zmm6\{k7\}\{z\},zmm5
22 [ ]*[a-f0-9]+: 62 f1 7c cf 29 ee vmovaps.s zmm6\{k7\}\{z\},zmm5
23 [ ]*[a-f0-9]+: 62 f1 7c cf 28 f5 vmovaps zmm6\{k7\}\{z\},zmm5
28 [ ]*[a-f0-9]+: 62 f1 7d cf 7f ee vmovdqa32.s zmm6\{k7\}\{z\},zmm5
29 [ ]*[a-f0-9]+: 62 f1 7d cf 6f f5 vmovdqa32 zmm6\{k7\}\{z\},zmm5
34 [ ]*[a-f0-9]+: 62 f1 fd cf 7f ee vmovdqa64.s zmm6\{k7\}\{z\},zmm5
35 [ ]*[a-f0-9]+: 62 f1 fd cf 6f f5 vmovdqa64 zmm6\{k7\}\{z\},zmm5
40 [ ]*[a-f0-9]+: 62 f1 7e cf 7f ee vmovdqu32.s zmm6\{k7\}\{z\},zmm5
41 [ ]*[a-f0-9]+: 62 f1 7e cf 6f f5 vmovdqu32 zmm6\{k7\}\{z\},zmm5
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mmix/
Dcomment-1.s5 Main TRAP 123 ignore; x y z
6 TRAP 1,23 all; x y z
7 TRAP 1,2,3 these; x y z
8 FCMP $3,$2,$1 comments; x y z
9 FLOT $5,6 and; x y z
10 FLOT $7,ROUND_UP,8 do; x y z
11 FIX $9,$10 nothing; x y z
12 FIX $11,ROUND_DOWN,$12 that; x y z
13 ADDU $15,$16,17 would make; x y z
14 LDA $18,$19 a; x y z
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/
Dbundle.d13 *0:\s+[0-9a-f]{8}\s+[a-z].+
15 *10:\s+[0-9a-f]{8}\s+[a-z].+
17 *20:\s+[0-9a-f]{8}\s+[a-z].+
19 *30:\s+[0-9a-f]{8}\s+[a-z].+
23 *40:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
25 *50:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
27 *60:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
29 *70:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
31 *80:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
33 *90:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/crx/
Dcmpbr_insn.d10 0: 81 30 2b 20 cmpbeqb r1, r2, 0x[0-9a-f]* [-_<>+0-9a-z]*
11 4: 83 31 00 40 cmpbeqb r3, r4, 0x[0-9a-f]* [-_<>+0-9a-z]*
13 a: c0 30 1b 50 cmpbeqb \$0x0, r5, 0x[0-9a-f]* [-_<>+0-9a-z]*
14 e: c1 31 1a 60 cmpbeqb \$0x1, r6, 0x[0-9a-f]* [-_<>+0-9a-z]*
18 14: 87 30 7d 81 cmpbneb r7, r8, 0x[0-9a-f]* [-_<>+0-9a-z]*
19 18: 89 31 00 a1 cmpbneb r9, r10, 0x[0-9a-f]* [-_<>+0-9a-z]*
21 1e: c2 30 01 b1 cmpbneb \$0x2, r11, 0x[0-9a-f]* [-_<>+0-9a-z]*
22 22: c3 31 7f c1 cmpbneb \$0x3, r12, 0x[0-9a-f]* [-_<>+0-9a-z]*
26 28: 8d 31 00 e4 cmpbhib r13, r14, 0x[0-9a-f]* [-_<>+0-9a-z]*
28 2e: 8f 31 00 e4 cmpbhib r15, r14, 0x[0-9a-f]* [-_<>+0-9a-z]*
[all …]
Dbr_insn.d10 0: 08 70 beq 0x[0-9a-f]* [-_<>+0-9a-z]*
11 2: 7e 70 fd 07 beq 0x[0-9a-f]* [-_<>+0-9a-z]*
12 6: 7f 70 04 00 beq 0x[0-9a-f]* [-_<>+0-9a-z]*
16 c: fc 71 bne 0x[0-9a-f]* [-_<>+0-9a-z]*
17 e: 7e 71 a3 07 bne 0x[0-9a-f]* [-_<>+0-9a-z]*
18 12: 7f 71 f8 ff bne 0x[0-9a-f]* [-_<>+0-9a-z]*
22 18: 7d 72 bcs 0x[0-9a-f]* [-_<>+0-9a-z]*
23 1a: 7e 72 c6 ec bcs 0x[0-9a-f]* [-_<>+0-9a-z]*
24 1e: 7f 72 04 00 bcs 0x[0-9a-f]* [-_<>+0-9a-z]*
28 24: 83 73 bcc 0x[0-9a-f]* [-_<>+0-9a-z]*
[all …]
Dbit_insn.d10 0: 06 39 00 00 cbitb \$0x6, 0x450 [-_<>+0-9a-z]*
12 6: 06 38 50 04 cbitb \$0x6, 0xffff0450 [-_<>+0-9a-z]*
13 a: 07 39 04 00 cbitb \$0x7, 0x41287 [-_<>+0-9a-z]*
25 28: 2f 39 00 00 cbitw \$0xf, 0x23 [-_<>+0-9a-z]*
27 2e: 26 38 23 00 cbitw \$0x6, 0xffff0023 [-_<>+0-9a-z]*
28 32: 21 39 0f 00 cbitw \$0x1, 0xff287 [-_<>+0-9a-z]*
40 50: 66 39 00 00 cbitd \$0x6, 0xff [-_<>+0-9a-z]*
42 56: 66 38 ff 0f cbitd \$0x6, 0xffff0fff [-_<>+0-9a-z]*
43 5a: 7a 39 01 00 cbitd \$0x1a, 0x10000 [-_<>+0-9a-z]*
56 7e: 0e 39 00 00 sbitb \$0x6, 0x450 [-_<>+0-9a-z]*
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/
Dopc-i.s96 dep.z r4 = r5, 0, 16
97 dep.z r4 = r5, 0, 63
98 dep.z r4 = r5, 10, 40
99 dep.z r4 = 0, 0, 16
100 dep.z r4 = 127, 0, 63
101 dep.z r4 = -128, 5, 50
102 dep.z r4 = 0x55, 10, 40
149 tbit.z p2, p3 = r4, 0
150 tbit.z.unc p2, p3 = r4, 1
151 tbit.z.and p2, p3 = r4, 2
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/bfin/
Dparallel2.s50 r1.H = r2.l >> 15 || R5 = W [P1--] (z);
51 r7.l = r0.L << 0 || R5 = W [P2] (z);
52 r5 = r5 >> 31 || R7 = W [P2++] (z);
53 r0 = r0 << 12 || R5 = W [P2--] (z);
54 A0 = A0 >> 1 || R5 = W [P2+0] (z);
55 A0 = A0 << 0 || R5 = W [P2+2] (z);
56 a1 = A1 << 31 || R5 = W [P2+4] (z);
57 a1 = a1 >> 16 || R5 = W [P2+30] (z);
59 R1.H = LShift r2.h by r0.l || R5 = W [P2+24] (z);
60 r0.l = LSHIFT r0.h by r1.l || R5 = W [P2+22] (z);
[all …]

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