Searched refs:ASE_VIRT64 (Results 1 – 6 of 6) sorted by relevance
| /toolchain/binutils/binutils-2.25/opcodes/ |
| D | mips-dis.c | 599 | ASE_MCU | ASE_VIRT | ASE_VIRT64 | ASE_MSA | ASE_MSA64 | ASE_XPA
608 | ASE_MCU | ASE_VIRT | ASE_VIRT64 | ASE_MSA | ASE_MSA64 | ASE_XPA
617 | ASE_MCU | ASE_VIRT | ASE_VIRT64 | ASE_MSA | ASE_MSA64 | ASE_XPA
625 (ASE_EVA | ASE_MSA | ASE_MSA64 | ASE_XPA | ASE_VIRT | ASE_VIRT64
662 ISA_MIPS64R5 | INSN_OCTEON3, ASE_VIRT | ASE_VIRT64,
889 mips_ase |= ASE_VIRT64; in parse_mips_dis_option()
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| D | micromips-opc.c | 276 #define IVIRT64 ASE_VIRT64
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| D | mips-opc.c | 379 #define IVIRT64 ASE_VIRT64
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| /toolchain/binutils/binutils-2.25/include/opcode/ |
| D | mips.h | 1273 #define ASE_VIRT64 0x00000400 macro
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| /toolchain/binutils/binutils-2.25/include/ |
| D | ChangeLog | 175 (INSN_VIRT64): Rename to ASE_VIRT64. Provide new value.
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| /toolchain/binutils/binutils-2.25/gas/config/ |
| D | tc-mips.c | 1711 { "virt", ASE_VIRT, ASE_VIRT64,
18829 { "octeon3", 0, ASE_VIRT | ASE_VIRT64, ISA_MIPS64R5, CPU_OCTEON3 },
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