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Searched refs:CRC (Results 1 – 6 of 6) sorted by relevance

/toolchain/binutils/binutils-2.25/opcodes/
Daarch64-tbl.h1230 #define CRC &aarch64_feature_crc macro
1839 {"crc32b", 0x1ac04000, 0xffe0fc00, dp_2src, 0, CRC, OP3 (Rd, Rn, Rm), QL_I3SAMEW, 0},
1840 {"crc32h", 0x1ac04400, 0xffe0fc00, dp_2src, 0, CRC, OP3 (Rd, Rn, Rm), QL_I3SAMEW, 0},
1841 {"crc32w", 0x1ac04800, 0xffe0fc00, dp_2src, 0, CRC, OP3 (Rd, Rn, Rm), QL_I3SAMEW, 0},
1842 {"crc32x", 0x9ac04c00, 0xffe0fc00, dp_2src, 0, CRC, OP3 (Rd, Rn, Rm), QL_I3WWX, 0},
1843 {"crc32cb", 0x1ac05000, 0xffe0fc00, dp_2src, 0, CRC, OP3 (Rd, Rn, Rm), QL_I3SAMEW, 0},
1844 {"crc32ch", 0x1ac05400, 0xffe0fc00, dp_2src, 0, CRC, OP3 (Rd, Rn, Rm), QL_I3SAMEW, 0},
1845 {"crc32cw", 0x1ac05800, 0xffe0fc00, dp_2src, 0, CRC, OP3 (Rd, Rn, Rm), QL_I3SAMEW, 0},
1846 {"crc32cx", 0x9ac05c00, 0xffe0fc00, dp_2src, 0, CRC, OP3 (Rd, Rn, Rm), QL_I3WWX, 0},
DChangeLog-20131133 * arm-dis.c (arm_opcodes): Add entries for CRC instructions.
1150 (CRC): New macro.
/toolchain/binutils/binutils-2.25/gas/doc/
Dc-aarch64.texi126 @tab Enable CRC instructions.
/toolchain/binutils/binutils-2.25/libiberty/
Dfunctions.texi190 Compute the 32-bit CRC of @var{buf} which has length @var{len}. The
191 starting value is @var{init}; this may be used to compute the CRC of
195 This is intended to match the CRC used by the @command{gdb} remote
197 results as gdb for a block of data, you must pass the first CRC
200 This CRC can be specified as:
209 This differs from the "standard" CRC-32 algorithm in that the values
/toolchain/binutils/binutils-2.25/cpu/
Diq10.cpu292 (dni crc32 "CRC, 32 bit input" (MACH10 USES-RD USES-RS USES-RT)
298 (dni crc32b "CRC, 8 bit input" (MACH10 USES-RD USES-RS USES-RT)
/toolchain/binutils/binutils-2.25/gas/
DChangeLog31 * config/tc-aarch64.c (aarch64_cpus): Add CRC feature for