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Searched refs:D16 (Results 1 – 12 of 12) sorted by relevance

/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/
Dvfpv3-d16-bad.d1 # name: VFPv3-D16
Dattr-mfpu-vfpv4-d16.d12 Tag_FP_arch: VFPv4-D16
Dattr-mfpu-vfpv3-d16.d12 Tag_FP_arch: VFPv3-D16
/toolchain/binutils/binutils-2.25/ld/testsuite/ld-arm/
Dattr-merge-vfp-1.d13 Tag_FP_arch: VFPv3-D16
Dattr-merge-vfp-1r.d13 Tag_FP_arch: VFPv3-D16
Dattr-merge-vfp-3.d13 Tag_FP_arch: VFPv4-D16
Dattr-merge-vfp-3r.d13 Tag_FP_arch: VFPv4-D16
/toolchain/binutils/binutils-2.25/opcodes/
Dv850-opc.c1202 #define D16 (I16U + 1) macro
1206 #define D16_16 (D16 + 1)
1457 { "clr1", two (0x87c0, 0x0000), two (0xc7e0, 0x0000), {B3, D16, R1}, 3, PROCESSOR_ALL },
1580 { "ld.b", two (0x0700, 0x0000), two (0x07e0, 0x0000), {D16, R1, R2}, 2, PROCESSOR_ALL },
1654 { "not1", two (0x47c0, 0x0000), two (0xc7e0, 0x0000), {B3, D16, R1}, 3, PROCESSOR_ALL },
1710 { "set1", two (0x07c0, 0x0000), two (0xc7e0, 0x0000), {B3, D16, R1}, 3, PROCESSOR_ALL },
1744 { "st.b", two (0x0740, 0x0000), two (0x07e0, 0x0000), {R2, D16, R1}, 3, PROCESSOR_ALL },
1794 { "tst1", two (0xc7c0, 0x0000), two (0xc7e0, 0x0000), {B3, D16, R1}, 3, PROCESSOR_ALL },
DChangeLog-92971579 (v850_operands): Change D16 to D16_15, use special insert/extract
1580 routines. New new D16 that uses the generic insert/extract code.
1582 (IF7C, IF7D): New. Use D16.
1638 * v850-opc.c (v850_operands): D16 inserts at offset 16!
/toolchain/binutils/binutils-2.25/binutils/
DChangeLog-2008640 * readelf.c (arm_attr_tag_VFP_arch): Add "VFPv3-D16".
DChangeLog-2009183 * readelf.c (arm_attr_tag_VFP_arch): Add VFPv4 and VFPv4-D16.
/toolchain/binutils/binutils-2.25/gas/
DChangeLog-20081429 (aeabi_set_public_attributes): Handle Tag_VFP_arch=VFPV3-D16.