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/toolchain/binutils/binutils-2.25/opcodes/
Dmicromips-opc.c262 #define D32 ASE_DSP macro
816 {"madd", "7,s,t", 0x00000abc, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 },
821 {"maddu", "7,s,t", 0x00001abc, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 },
834 {"mfhi", "s,7", 0x0000007c, 0xffe03fff, WR_1|RD_HI, 0, 0, D32, 0 },
837 {"mflo", "s,7", 0x0000107c, 0xffe03fff, WR_1|RD_LO, 0, 0, D32, 0 },
862 {"msub", "7,s,t", 0x00002abc, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 },
867 {"msubu", "7,s,t", 0x00003abc, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 },
879 {"mthi", "s,7", 0x0000207c, 0xffe03fff, RD_1|WR_HI, 0, 0, D32, 0 },
881 {"mtlo", "s,7", 0x0000307c, 0xffe03fff, RD_1|WR_LO, 0, 0, D32, 0 },
892 {"mult", "7,s,t", 0x00000cbc, 0xfc003fff, RD_2|RD_3|WR_a, 0, 0, D32, 0 },
[all …]
Dmips-opc.c429 #define D32 ASE_DSP macro
1279 {"lbux", "d,t(b)", 0x7c00018a, 0xfc0007ff, WR_1|RD_2|RD_3|LM, 0, IOCT2, D32, 0},
1281 {"lhx", "d,t(b)", 0x7c00010a, 0xfc0007ff, WR_1|RD_2|RD_3|LM, 0, IOCT2, D32, 0},
1283 {"lwx", "d,t(b)", 0x7c00000a, 0xfc0007ff, WR_1|RD_2|RD_3|LM, 0, IOCT2, D32, 0},
1390 {"madd", "7,s,t", 0x70000000, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 },
1399 {"maddu", "7,s,t", 0x70000001, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 },
1456 {"mfhi", "d,9", 0x00000010, 0xff9f07ff, WR_1|RD_HI, 0, 0, D32, 0 },
1459 {"mflo", "d,9", 0x00000012, 0xff9f07ff, WR_1|RD_LO, 0, 0, D32, 0 },
1523 {"msub", "7,s,t", 0x70000004, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 },
1527 {"msubu", "7,s,t", 0x70000005, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 },
[all …]
DChangeLog-2013953 * micromips-opc.c (D32, D33, MC): Update definitions.
958 * mips-opc.c (M3D, SMT, MX, IVIRT, IVIRT64, D32, D33, D64,
DChangeLog-201061 * mips-opc.c (madd, maddu, msub, msubu, mult, multu): Change D33 to D32.
DChangeLog-2012543 (D32, D33): Likewise.
DChangeLog-2005426 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.