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Searched refs:FMUL (Results 1 – 10 of 10) sorted by relevance

/toolchain/binutils/binutils-2.25/opcodes/
Dm88k-dis.c191 …{0x84000000,"fmul.sss ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {6,1,PFLT,FMUL ,0,1,1,1,0…
192 …{0x84000080,"fmul.ssd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {9,2,PFLT,FMUL ,0,1,1,1,0…
193 …{0x84000200,"fmul.sds ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {9,2,PFLT,FMUL ,0,1,1,1,0…
194 …{0x84000280,"fmul.sdd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {9,2,PFLT,FMUL ,0,1,1,1,0…
195 …{0x84000020,"fmul.dss ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {9,2,PFLT,FMUL ,0,1,1,1,0…
196 …{0x840000a0,"fmul.dsd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {9,2,PFLT,FMUL ,0,1,1,1,0…
197 …{0x84000220,"fmul.dds ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {9,2,PFLT,FMUL ,0,1,1,1,0…
198 …{0x840002a0,"fmul.ddd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {9,2,PFLT,FMUL ,0,1,1,1,0…
DChangeLog-00011873 FMUL instruction.
1874 (reg_fmul_r): New. Extract source register from FMUL instruction.
1879 (print_insn_avr): Handle MOVW, MULS, MULSU, FMUL, FMULS, FMULSU,
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/
Dfloatdp2.s29 .irp op, FMUL, FDIV, FADD, FSUB, FMAX, FMIN, FMAXNM, FMINNM, FNMUL
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mmix/
Dreg-op.s3 Main FMUL X,Y,Z
Dreg-op.l6 3 0000 10170C43 Main FMUL X,Y,Z
Dlist-insns.s33 FMUL $102,$30,$40
Dlist-insns.l36 33 0068 10661E28 FMUL \$102,\$30,\$40
/toolchain/binutils/binutils-2.25/include/opcode/
Dm88k.h344 #define FMUL NOP +3 macro
/toolchain/binutils/binutils-2.25/gas/config/
Drx-parse.y154 %token FADD FCMP FDIV FMUL FREIT FSUB FTOI
653 | FMUL { sub_op = 3; } float2_op
1027 OPC(FMUL),
/toolchain/binutils/binutils-2.25/gas/doc/
Dc-pdp11.texi100 @code{FADD}, @code{FDIV}, @code{FMUL}, and @code{FSUB}.