| /toolchain/binutils/binutils-2.25/opcodes/ |
| D | mips-opc.c | 689 {"abs.d", "D,V", 0x46200005, 0xffff003f, WR_1|RD_2|FP_D, 0, I1, 0, SF },
690 {"abs.ps", "D,V", 0x46c00005, 0xffff003f, WR_1|RD_2|FP_D, 0, I5_33|IL2F, 0, I37 },
691 {"abs.ps", "D,V", 0x45600005, 0xffff003f, WR_1|RD_2|FP_D, 0, IL2E, 0, 0 },
699 {"add.d", "D,V,T", 0x46200000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, I1, 0, SF },
700 {"add.ob", "X,Y,Q", 0x7800000b, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, MX, 0 },
701 {"add.ob", "D,S,Q", 0x4800000b, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, N54, 0, 0 },
702 {"add.ps", "D,V,T", 0x46c00000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, I5_33|IL2F, 0, I37 },
703 {"add.ps", "D,V,T", 0x45600000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
704 {"add.qh", "X,Y,Q", 0x7820000b, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, 0, MX, 0 },
705 {"adda.ob", "Y,Q", 0x78000037, 0xfc2007ff, RD_1|RD_2|FP_D, WR_MACC, SB1, MX, 0 },
[all …]
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| D | micromips-opc.c | 313 {"abs.d", "T,V", 0x5400237b, 0xfc00ffff, WR_1|RD_2|FP_D, 0, I1, 0, 0 },
315 {"abs.ps", "T,V", 0x5400437b, 0xfc00ffff, WR_1|RD_2|FP_D, 0, I1, 0, 0 },
320 {"add.d", "D,V,T", 0x54000130, 0xfc0007ff, WR_1|RD_2|RD_3|FP_D, 0, I1, 0, 0 },
322 {"add.ps", "D,V,T", 0x54000230, 0xfc0007ff, WR_1|RD_2|RD_3|FP_D, 0, I1, 0, 0 },
341 {"alnv.ps", "D,V,T,y", 0x54000019, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_D, 0, I1, 0, 0 },
439 {"c.f.d", "S,T", 0x5400043c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 },
440 {"c.f.d", "M,S,T", 0x5400043c, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 },
443 {"c.f.ps", "S,T", 0x5400083c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 },
444 {"c.f.ps", "M,S,T", 0x5400083c, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 },
445 {"c.un.d", "S,T", 0x5400047c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 },
[all …]
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| D | mips-dis.c | 1064 if (opcode->pinfo & (FP_D | FP_S)) in print_reg()
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| D | ChangeLog-2006 | 482 FP_S and FP_D flags to denote single and double register
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| D | ChangeLog-2013 | 397 * mips-opc.c (mips_builtin_opcodes): Add FP_D to VR5400 vector
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| D | ChangeLog-2009 | 1610 * mips-opc.c (suxc1): Add the flag of FP_D.
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| D | ChangeLog-9297 | 3 * mips-opc.c: Add FP_D to s.d instruction flags.
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| /toolchain/binutils/binutils-2.25/include/opcode/ |
| D | mips.h | 1071 #define FP_D 0x02000000 macro
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| D | ChangeLog | 737 * mips.h: Document the use of FP_D in MIPS16 mode. Adjust the
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| D | ChangeLog-9103 | 1850 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
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| /toolchain/binutils/binutils-2.25/gas/config/ |
| D | tc-aarch64.c | 288 BASIC_REG_TYPE(FP_D) /* d[0-31] */ \
300 | REG_TYPE(FP_S) | REG_TYPE(FP_D) | REG_TYPE(FP_Q)) \
305 | REG_TYPE(FP_S) | REG_TYPE(FP_D) | REG_TYPE(FP_Q)) \
5732 REGSET (d, FP_D), REGSET (D, FP_D),
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| D | tc-mips.c | 3263 fp_d = mo->pinfo & FP_D; in is_opcode_valid()
4620 if (FPR_SIZE != 64 && (pinfo & FP_D)) in fpr_read_mask()
4639 if (FPR_SIZE != 64 && (pinfo & FP_D)) in fpr_write_mask()
4668 switch (insn->pinfo & (FP_S | FP_D)) in mips_oddfpreg_ok()
4673 case FP_D: in mips_oddfpreg_ok()
4847 && (opcode->pinfo & FP_D) in convert_reg_type()
4857 if (opcode->pinfo & (FP_D | FP_S)) in convert_reg_type()
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| /toolchain/binutils/binutils-2.25/gas/ |
| D | ChangeLog-9697 | 15 (mips_ip): Always check for FP_D, not just for instructions that
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