Home
last modified time | relevance | path

Searched refs:HW_H_ADDR (Results 1 – 25 of 26) sorted by relevance

12

/toolchain/binutils/binutils-2.25/opcodes/
Dlm32-desc.h149 HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR enumerator
Dxc16x-desc.c632 { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
808 { "upof16", XC16X_OPERAND_UPOF16, HW_H_ADDR, 31, 16,
848 { "caddr", XC16X_OPERAND_CADDR, HW_H_ADDR, 31, 16,
912 { "memory", XC16X_OPERAND_MEMORY, HW_H_ADDR, 31, 16,
Dm32r-desc.h178 HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR enumerator
Dip2k-desc.h199 HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR enumerator
Dfr30-desc.h201 HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR enumerator
Dxstormy16-desc.h228 HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR enumerator
Dmt-desc.h187 HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR enumerator
Dm32r-desc.c236 { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
402 { "uimm24", M32R_OPERAND_UIMM24, HW_H_ADDR, 8, 24,
Diq2000-desc.h244 HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR enumerator
Depiphany-desc.c320 { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
884 { "imm16", EPIPHANY_OPERAND_IMM16, HW_H_ADDR, 12, 16,
888 { "imm8", EPIPHANY_OPERAND_IMM8, HW_H_ADDR, 12, 8,
Depiphany-desc.h269 HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR enumerator
Dmep-desc.h208 HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR enumerator
Dxc16x-desc.h317 HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR enumerator
Dip2k-desc.c273 { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
Dlm32-desc.c222 { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
Dxstormy16-desc.c228 { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
Dm32c-desc.h174 HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR enumerator
Dmt-desc.c196 { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
Dfr30-desc.c261 { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
Dm32r-opinst.c281 { INPUT, "uimm24", HW_H_ADDR, CGEN_MODE_USI, OP_ENT (UIMM24), 0, 0 },
Dor1k-desc.h425 HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR enumerator
Dfrv-desc.h685 HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR enumerator
Diq2000-desc.c222 { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
Dor1k-desc.c284 { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
Dfrv-desc.c1849 { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },

12