Searched refs:I5 (Results 1 – 4 of 4) sorted by relevance
| /toolchain/binutils/binutils-2.25/opcodes/ |
| D | v850-opc.c | 1124 #define I5 (D4U + 1) macro
1128 #define I5DIV1 (I5 + 1)
1297 #define IF2 {I5, R2}
1461 { "cmov", two (0x07e0, 0x0300), two (0x07e0, 0x07e1), {MOVCC, I5, R2, R3}, 0, PROCESSOR_NOT_V850 …
1630 { "mov", OP (0x10), OP_MASK, {I5, R2_NOTR0}, 0, PROCESSOR_ALL },
1642 { "mulh", OP (0x17), OP_MASK, {I5, R2_NOTR0}, 0, PROCESSOR_ALL },
1685 { "satadd", OP (0x11), OP_MASK, {I5, R2_NOTR0}, 0, PROCESSOR_ALL },
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| D | ChangeLog-9899 | 20 * mips-opc.c (I5): New.
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| D | mips-opc.c | 330 #define I5 INSN_ISA5 macro
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| D | ChangeLog-9297 | 1659 IF4C & IF4D. For "trap" use I5U, not I5. Add IF1 operand
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