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Searched refs:M68XG_OP_R_IMM4 (Results 1 – 4 of 4) sorted by relevance

/toolchain/binutils/binutils-2.25/include/opcode/
Dm68hc11.h372 #define M68XG_OP_R_IMM4 0x0010 macro
/toolchain/binutils/binutils-2.25/gas/config/
Dtc-m68hc11.c682 else if (opcodes->format & (M68XG_OP_R_R | M68XG_OP_R_IMM4 in md_begin()
770 else if (format & M68XG_OP_R_IMM4) in print_opcode_format()
1491 case M68XG_OP_R_IMM4: in check_range()
3127 & (M68XG_OP_R_IMM8 | M68XG_OP_R_IMM16 | M68XG_OP_R_IMM4))) in md_assemble()
3159 & (M68XG_OP_R_IMM8 | M68XG_OP_R_IMM16 | M68XG_OP_R_IMM4); in md_assemble()
3160 if (opcode_local.format & M68XG_OP_R_IMM4) in md_assemble()
3162 operands[0].mode = M68XG_OP_R_IMM4; in md_assemble()
3174 (operands[0].exp.X_add_number,M68XG_OP_R_IMM4)) in md_assemble()
/toolchain/binutils/binutils-2.25/opcodes/
Dm68hc11-opc.c1620 { "asr", M68XG_OP_R_IMM4, 2, 0x0809, 0, 0, 0, 0, 0, cpuxgate, 0xf80f },
1621 { "csl", M68XG_OP_R_IMM4, 2, 0x080a, 0, 0, 0, 0, 0, cpuxgate, 0xf80f },
1622 { "csr", M68XG_OP_R_IMM4, 2, 0x080b, 0, 0, 0, 0, 0, cpuxgate, 0xf80f },
1623 { "lsl", M68XG_OP_R_IMM4, 2, 0x080c, 0, 0, 0, 0, 0, cpuxgate, 0xf80f },
1624 { "lsr", M68XG_OP_R_IMM4, 2, 0x080d, 0, 0, 0, 0, 0, cpuxgate, 0xf80f },
1625 { "rol", M68XG_OP_R_IMM4, 2, 0x080e, 0, 0, 0, 0, 0, cpuxgate, 0xf80f },
1626 { "ror", M68XG_OP_R_IMM4, 2, 0x080f, 0, 0, 0, 0, 0, cpuxgate, 0xf80f },
Dm68hc11-dis.c292 else if (format & M68XG_OP_R_IMM4) in print_insn()