Searched refs:NOP (Results 1 – 25 of 166) sorted by relevance
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/bfin/ |
| D | parallel2.d | 8 0: 08 cc 3f c0 A0 = A1 \|\| P0 = \[SP \+ 0x14\] \|\| NOP;
10 8: 08 cc 3f e0 A1 = A0 \|\| P0 = \[P5 \+ 0x18\] \|\| NOP;
12 10: 09 cc 00 20 A0 = R0 \|\| P0 = \[P4 \+ 0x1c\] \|\| NOP;
14 18: 09 cc 08 a0 A1 = R1 \|\| P0 = \[P3 \+ 0x20\] \|\| NOP;
16 20: 8b c8 00 39 R4 = A0 \(FU\) \|\| P0 = \[P3 \+ 0x24\] \|\| NOP;
18 28: 2f c9 00 19 R5 = A1 \(ISS2\) \|\| P0 = \[P3 \+ 0x28\] \|\| NOP;
20 30: 0b c8 80 39 R6 = A0 \|\| P0 = \[P4 \+ 0x2c\] \|\| NOP;
22 38: 0f c8 80 19 R7 = A1 \|\| P0 = \[P4 \+ 0x30\] \|\| NOP;
24 40: 0f c8 80 39 R7 = A1, R6 = A0 \|\| P0 = \[P4 \+ 0x34\] \|\| NOP;
26 48: 8f c8 00 38 R1 = A1, R0 = A0 \(FU\) \|\| P0 = \[P4 \+ 0x38\] \|\| NOP;
[all …]
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| D | parallel3.d | 8 …c cc 0d 08 R4.H = R4.L = SIGN \(R1.H\) \* R5.H \+ SIGN \(R1.L\) \* R5.L \|\| \[P0\] = P0 \|\| NOP;
10 8: 09 ce 15 8e R7 = VIT_MAX \(R5, R2\) \(ASL\) \|\| \[P0\+\+\] = P0 \|\| NOP;
12 10: 09 ce 30 c0 R0 = VIT_MAX \(R0, R6\) \(ASR\) \|\| \[P0--\] = P0 \|\| NOP;
14 18: 09 ce 03 0a R5.L = VIT_MAX \(R3\) \(ASL\) \|\| \[P0 \+ 0x4\] = P0 \|\| NOP;
16 20: 09 ce 02 44 R2.L = VIT_MAX \(R2\) \(ASR\) \|\| \[P0 \+ 0x8\] = P0 \|\| NOP;
18 28: 06 cc 28 8a R5 = ABS R5 \(V\) \|\| \[P0 \+ 0x3c\] = P0 \|\| NOP;
20 30: 06 cc 00 84 R2 = ABS R0 \(V\) \|\| \[P0 \+ 0x38\] = P0 \|\| NOP;
22 38: 00 cc 1a 0a R5 = R3 \+\|\+ R2 \|\| \[P0 \+ 0x34\] = P0 \|\| NOP;
24 40: 00 cc 1a 3a R5 = R3 \+\|\+ R2 \(SCO\) \|\| \[P1\] = P0 \|\| NOP;
26 48: 00 cc 06 8e R7 = R0 -\|\+ R6 \|\| \[P1\+\+\] = P0 \|\| NOP;
[all …]
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| D | parallel4.d | 8 0: 0d ce 15 0e R7 = ALIGN8 \(R5, R2\) \|\| \[I0\] = R0 \|\| NOP;
10 8: 0d ce 08 4a R5 = ALIGN16 \(R0, R1\) \|\| \[I0\+\+\] = R0 \|\| NOP;
12 10: 0d ce 05 84 R2 = ALIGN24 \(R5, R0\) \|\| \[I0--\] = R0 \|\| NOP;
14 18: 12 cc 00 c0 DISALGNEXCPT \|\| \[I1\] = R0 \|\| NOP;
16 20: 17 cc 02 0a R5 = BYTEOP3P \(R1:0, R3:2\) \(LO\) \|\| \[I1\+\+\] = R0 \|\| NOP;
18 28: 37 cc 02 00 R0 = BYTEOP3P \(R1:0, R3:2\) \(HI\) \|\| \[I1--\] = R0 \|\| NOP;
20 30: 17 cc 02 22 R1 = BYTEOP3P \(R1:0, R3:2\) \(LO, R\) \|\| \[I2\] = R0 \|\| NOP;
22 38: 37 cc 02 24 R2 = BYTEOP3P \(R1:0, R3:2\) \(HI, R\) \|\| \[I2\+\+\] = R0 \|\| NOP;
24 40: 0c cc 7f 45 R5 = A1.L \+ A1.H, R2 = A0.L \+ A0.H \|\| \[I2--\] = R0 \|\| NOP;
26 48: 15 cc 82 06 \(R2, R3\) = BYTEOP16P \(R1:0, R3:2\) \|\| \[I3\] = R0 \|\| NOP;
[all …]
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| D | parallel_illegal.d | 8 0: 03 c8 00 18 MNOP || NOP || NOP;
10 8: 03 c8 MNOP || ILLEGAL || NOP;.*
13 e: 00 00 NOP;
14 10: 03 c8 MNOP || NOP || ILLEGAL;.*
16 14: 00 00 NOP;
29 30: 00 00 NOP;
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| D | parallel.d | 8 0: 0a ce 13 8a R5 = DEPOSIT \(R3, R2\) \|\| I0 \+= 0x2 \|\| NOP;
10 8: 0a ce 37 c0 R0 = DEPOSIT \(R7, R6\) \(X\) \|\| I1 \+= 0x4 \|\| NOP;
12 10: 0a ce 0a 08 R4 = EXTRACT \(R2, R1.L\) \(Z\) \|\| I2 -= M0 \|\| NOP;
14 18: 0a ce 10 04 R2 = EXTRACT \(R0, R2.L\) \(Z\) \|\| I3 \+= M1 \|\| NOP;
16 20: 0a ce 23 4e R7 = EXTRACT \(R3, R4.L\) \(X\) \|\| I3 \+= M1 \(BREV\) \|\| NOP;
18 28: 0a ce 0e 4a R5 = EXTRACT \(R6, R1.L\) \(X\) \|\| I0 -= 0x2 \|\| NOP;
20 30: 08 ce 08 00 BITMUX \(R1, R0, A0\) \(ASR\) \|\| I1 -= 0x4 \|\| NOP;
22 38: 08 ce 13 00 BITMUX \(R2, R3, A0\) \(ASR\) \|\| I0 \+= 0x2 \|\| NOP;
24 40: 08 ce 25 40 BITMUX \(R4, R5, A0\) \(ASL\) \|\| SP = \[P0\] \|\| NOP;
26 48: 08 ce 3e 40 BITMUX \(R7, R6, A0\) \(ASL\) \|\| FP = \[P1\+\+\] \|\| NOP;
[all …]
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| D | flow2.s | 132 NOP;NOP;
139 NOP;
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| /toolchain/binutils/binutils-2.25/include/opcode/ |
| D | m88k.h | 338 #define NOP XCR +1 macro
342 #define FADD NOP +1
343 #define FSUB NOP +2
344 #define FMUL NOP +3
345 #define FDIV NOP +4
346 #define FSQRT NOP +5
347 #define FCMP NOP +6
348 #define FIP NOP +7
349 #define FLT NOP +8
350 #define INT NOP +9
[all …]
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/msp430/ |
| D | bad.l | 8 [^:]*:19: Warning: a NOP might be needed here because of successive changes in interrupt state
9 [^:]*:20: Warning: a NOP might be needed here because of successive changes in interrupt state
10 [^:]*:25: Warning: a NOP might be needed here because of successive changes in interrupt state
11 [^:]*:26: Warning: a NOP might be needed here because of successive changes in interrupt state
12 [^:]*:27: Warning: a NOP might be needed here because of successive changes in interrupt state
13 [^:]*:28: Warning: a NOP might be needed here because of successive changes in interrupt state
14 [^:]*: Warning: assembly finished with the last instruction changing interrupt state - a NOP might …
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| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-metag/ |
| D | pcrel.d | 12 .*: a0fffffe NOP
15 .*: a0fffffe NOP
18 .*: a0fffffe NOP
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| D | stub_pic_app.d | 13 .*: a0fffffe NOP
32 .*: a0fffffe NOP
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| D | thumb-nop.d | 1 # name: Thumb NOP
4 # Both explicit nop and padding should not use Thumb-2 NOP for the
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/epiphany/ |
| D | regression.s | 217 NOPLAB: NOP ;
218 NOP ;
219 NOP ;
220 NOP ;
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| /toolchain/binutils/binutils-2.25/gas/doc/ |
| D | c-msp430.texi | 33 also enables NOP generation unless the @option{-mN} is also specified.
37 also enables NOP generation unless the @option{-mN} is also specified.
49 enables the generation of a NOP instruction following any instruction
54 followed by a NOP instruction in order to ensure the correct
56 supply these NOP instructions, but this command line option enables
60 disables the generation of a NOP instruction following any instruction
65 tells the assembler to generate a warning message if a NOP does not
70 that the assembler will both warn about missing NOP instructions and
74 disables warnings about missing NOP instructions.
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| /toolchain/binutils/binutils-2.25/ld/scripttempl/ |
| D | nw.sc | 8 # NOP - four byte opcode for no-op (defaults to 0)
79 .init ${RELOCATING-0} : { *(.init) } =${NOP-0}
98 .fini ${RELOCATING-0} : { *(.fini) } =${NOP-0}
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| D | xstormy16.sc | 8 # NOP - two byte opcode for no-op (defaults to 0)
187 } ${RELOCATING+> ROM =${NOP-0}}
193 } ${RELOCATING+> ROM =${NOP-0}}
199 } ${RELOCATING+> ROM =${NOP-0}}
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| D | elfi370.sc | 10 # NOP - four byte opcode for no-op (defaults to 0)
100 } =${NOP-0}
101 .init ${RELOCATING-0} : { *(.init) } =${NOP-0}
102 .fini ${RELOCATING-0} : { *(.fini) } =${NOP-0}
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| /toolchain/binutils/binutils-2.25/ld/emulparams/ |
| D | elf64lppc.sh | 3 NOP=0x00000060
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| D | i386nw.sh | 6 NOP=0x90909090
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| D | hppaelf.sh | 6 NOP=0x08000240
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| D | i386moss.sh | 8 NOP=0x90909090
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| D | elf32am33lin.sh | 8 NOP=0xcbcb
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| D | elf32microblaze.sh | 12 NOP=0x80000000
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| D | elf32microblazeel.sh | 12 NOP=0x80000000
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| D | i386nto.sh | 9 NOP=0x9090
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| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-mmix/ |
| D | start.s | 1 * Just a start symbol and some non-NOP padding.
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