| /toolchain/binutils/binutils-2.25/opcodes/ |
| D | tic80-opc.c | 520 #define OP_REG(x) OP_LI(x) /* For readability */ macro
610 {"br", OP_REG(0x390), 0xFFFFF000, 0, {REG_0} },
613 {"br.a", OP_REG(0x392), 0xFFFFF000, 0, {REG_0} },
619 {"add", OP_REG(0x3B0), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
625 {"addu", OP_REG(0x3B2), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
631 {"and", OP_REG(0x322), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
634 {"and.tt", OP_REG(0x322), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
640 {"and.ff", OP_REG(0x330), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
646 {"and.ft", OP_REG(0x328), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
652 {"and.tf", OP_REG(0x324), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
[all …]
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| D | arc-opc.c | 28 enum operand {OP_NONE,OP_REG,OP_SHIMM,OP_LIMM}; enumerator
431 op_type = OP_REG; in insert_reg()
570 ls_operand[LS_BASE] = OP_REG; in insert_base()
622 ls_operand[LS_OFFSET] = OP_REG; in insert_offset()
716 if (!((ST_SYNTAX(OP_REG,OP_REG,OP_NONE) && (insn[0] & 511) == 0) in extract_st_syntax()
717 || ST_SYNTAX(OP_REG,OP_LIMM,OP_NONE) in extract_st_syntax()
718 || (ST_SYNTAX(OP_SHIMM,OP_REG,OP_NONE) && (insn[0] & 511) == 0) in extract_st_syntax()
723 || (ST_SYNTAX(OP_LIMM,OP_REG,OP_NONE) && (insn[0] & 511) == 0) in extract_st_syntax()
724 || ST_SYNTAX(OP_REG,OP_REG,OP_SHIMM) in extract_st_syntax()
725 || ST_SYNTAX(OP_REG,OP_SHIMM,OP_SHIMM) in extract_st_syntax()
[all …]
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| D | mips-formats.h | 77 { OP_REG, SIZE, LSB }, OP_REG_##BANK, 0 \
95 { OP_REG, SIZE, LSB }, OP_REG_##BANK, MAP \
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| D | i386-dis.c | 63 static void OP_REG (int, int);
282 #define RMeAX { OP_REG, eAX_reg }
283 #define RMeBX { OP_REG, eBX_reg }
284 #define RMeCX { OP_REG, eCX_reg }
285 #define RMeDX { OP_REG, eDX_reg }
286 #define RMeSP { OP_REG, eSP_reg }
287 #define RMeBP { OP_REG, eBP_reg }
288 #define RMeSI { OP_REG, eSI_reg }
289 #define RMeDI { OP_REG, eDI_reg }
290 #define RMrAX { OP_REG, rAX_reg }
[all …]
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| D | m68hc11-opc.c | 92 #define OP_REG M6812_OP_REG macro
628 | OP_REG | OP_JUMP_REL,3, 0x04, 3, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
630 | OP_REG | OP_JUMP_REL,3, 0x04, 3, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
739 | OP_REG | OP_REG_2, 2, 0xb7, 1, 1, CHG_NONE, cpu6812|cpu9s12x, 0 },
841 | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
843 | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
1386 | OP_REG | OP_REG_2, 2, 0xb7, 1, 1, CHG_NONE, cpu6812|cpu9s12x, 0 },
1530 | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
1535 | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
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| D | mips-dis.c | 1252 case OP_REG: in print_insn_arg()
1521 case OP_REG: in validate_insn_args()
1645 if (operand->type == OP_REG in print_insn_args()
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| D | ChangeLog-2012 | 507 * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
517 (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
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| D | ChangeLog-9899 | 316 (append_seg, OP_E, OP_G, OP_REG, OP_I, OP_sI, OP_J): Likewise.
376 (OP_REG): Add const to s.
871 (OP_REG): Reformat.
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| D | ChangeLog-2005 | 89 (OP_REG): Likewise.
374 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
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| D | ChangeLog-0001 | 763 (OP_REG <case rAX_reg .. rDI_reg>): Handle as for eAX_reg .. eDI_reg
1204 (OP_REG, OP_OFF): Declare.
1224 (OP_E, OP_G, OP_REG, OP_I, OP_J, OP_DIR, OP_OFF, OP_D): Add support for
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| D | ChangeLog-2006 | 68 (OP_REG): Delete unreachable case indir_dx_reg.
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| D | ChangeLog-2007 | 384 * i386-dis.c (OP_REG): Set add to 0 only when needed.
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| D | ChangeLog-2009 | 373 (OP_REG): Likewise.
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| /toolchain/binutils/binutils-2.25/gas/config/ |
| D | tc-msp430.c | 1160 op->mode = OP_REG; in msp430_srcoperand()
1167 op->mode = OP_REG; in msp430_srcoperand()
1174 op->mode = OP_REG; in msp430_srcoperand()
1181 op->mode = OP_REG; in msp430_srcoperand()
1197 op->mode = OP_REG; in msp430_srcoperand()
1214 op->mode = OP_REG; in msp430_srcoperand()
1248 op->mode = OP_REG; in msp430_srcoperand()
1255 op->mode = OP_REG; in msp430_srcoperand()
1262 op->mode = OP_REG; in msp430_srcoperand()
1269 op->mode = OP_REG; in msp430_srcoperand()
[all …]
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| D | tc-mips.c | 4463 case OP_REG: in operand_reg_mask()
6080 case OP_REG: in match_operand()
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| /toolchain/binutils/binutils-2.25/include/opcode/ |
| D | msp430.h | 31 #define OP_REG 0 macro
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| D | mips.h | 345 OP_REG, enumerator
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| /toolchain/binutils/binutils-2.25/include/elf/ |
| D | dwarf.h | 179 OP_REG = 0x01, enumerator
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