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Searched refs:Ra (Results 1 – 5 of 5) sorted by relevance

/toolchain/binutils/binutils-2.25/opcodes/
Dd30v-opc.c348 #define Ra (UNUSED + 1) macro
350 #define Ra2 (Ra + 1)
423 { SHORT_M, 0, { Ra, ATPAR, Rb, Rc } }, /* Ra,@(Rb,Rc) */
424 { SHORT_M, 1, { Ra, ATPAR, Rb, PLUS, Rc } }, /* Ra,@(Rb+,Rc) */
425 { SHORT_M, 2, { Ra, ATPAR, Rb, IMM6 } }, /* Ra,@(Rb,imm6) */
426 { SHORT_M, 3, { Ra, ATPAR, Rb, MINUS, Rc } }, /* Ra,@(Rb-,Rc) */
431 { SHORT_A, 0, { Ra, Rb, Rc } }, /* Ra,Rb,Rc */
432 { SHORT_A, 2, { Ra, Rb, IMM6 } }, /* Ra,Rb,imm6 */
444 { SHORT_D1r, 0, { Ra, Rc } }, /* Ra,Rc */
445 { SHORT_D1r, 2, { Ra, REL12S3 } }, /* Ra,rel12s3 */
[all …]
Daarch64-tbl.h1848 …{"madd", 0x1b000000, 0x7fe08000, dp_3src, 0, CORE, OP4 (Rd, Rn, Rm, Ra), QL_I4SAMER, F_HAS_ALIAS |…
1850 …{"msub", 0x1b008000, 0x7fe08000, dp_3src, 0, CORE, OP4 (Rd, Rn, Rm, Ra), QL_I4SAMER, F_HAS_ALIAS |…
1852 …{"smaddl", 0x9b200000, 0xffe08000, dp_3src, 0, CORE, OP4 (Rd, Rn, Rm, Ra), QL_I4SAMEL, F_HAS_ALIAS…
1854 …{"smsubl", 0x9b208000, 0xffe08000, dp_3src, 0, CORE, OP4 (Rd, Rn, Rm, Ra), QL_I4SAMEL, F_HAS_ALIAS…
1857 …{"umaddl", 0x9ba00000, 0xffe08000, dp_3src, 0, CORE, OP4 (Rd, Rn, Rm, Ra), QL_I4SAMEL, F_HAS_ALIAS…
1859 …{"umsubl", 0x9ba08000, 0xffe08000, dp_3src, 0, CORE, OP4 (Rd, Rn, Rm, Ra), QL_I4SAMEL, F_HAS_ALIAS…
DChangeLog-98991191 and SHORT_B3b formats to use Rb instead of Ra.
DChangeLog-00011475 * d30v-opc.c (d30v_format_tab): Use format Ra for
/toolchain/binutils/binutils-2.25/gas/config/
Dtc-arm.c11441 unsigned Rd, Rn, Rm, Ra; in do_t_mla() local
11446 Ra = inst.operands[3].reg; in do_t_mla()
11451 reject_bad_reg (Ra); in do_t_mla()
11456 inst.instruction |= Ra << 12; in do_t_mla()