Searched refs:RegXMM (Results 1 – 7 of 7) sorted by relevance
| /toolchain/binutils/binutils-2.25/opcodes/ |
| D | i386-opc.tbl | 938 // copying between Reg64/Mem64 and RegXMM/RegMMX, as is mandated by Intel's
941 …No_qSuf|No_ldSuf|SSE2AVX, { Reg32|Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegXMM }
942 …lSuf|No_sSuf|No_qSuf|No_ldSuf|Rex64|SSE2AVX, { Reg64|Qword|BaseIndex|Disp8|Disp32|Disp32S, RegXMM }
943 …0|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { RegXMM, Dword|Unspecified…
944 …reSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Rex64|SSE2AVX, { RegXMM, Qword|Reg64|BaseI…
945 …No_qSuf|No_ldSuf, { Reg32|Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|Disp32S, RegXMM }
946 …lSuf|No_sSuf|No_qSuf|No_ldSuf|Rex64, { Reg64|Qword|BaseIndex|Disp8|Disp32|Disp32S|Disp32S, RegXMM }
947 …E2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, Reg32|Dword|Unspe…
948 …drm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Rex64, { RegXMM, Reg64|Qword|BaseI…
960 …o_ldSuf|NoRex64|SSE2AVX, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
[all …]
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| D | i386-reg.tbl | 183 xmm0, RegXMM, 0, 0, 21, 17
184 xmm1, RegXMM, 0, 1, 22, 18
185 xmm2, RegXMM, 0, 2, 23, 19
186 xmm3, RegXMM, 0, 3, 24, 20
187 xmm4, RegXMM, 0, 4, 25, 21
188 xmm5, RegXMM, 0, 5, 26, 22
189 xmm6, RegXMM, 0, 6, 27, 23
190 xmm7, RegXMM, 0, 7, 28, 24
191 xmm8, RegXMM, RegRex, 0, Dw2Inval, 25
192 xmm9, RegXMM, RegRex, 1, Dw2Inval, 26
[all …]
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| D | i386-opc.h | 627 RegXMM, enumerator
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| D | i386-gen.c | 530 BITFIELD (RegXMM),
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| D | ChangeLog-2007 | 828 (RegXMM): Likewise.
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| /toolchain/binutils/binutils-2.25/gas/ |
| D | ChangeLog-9899 | 1657 * config/tc-i386.h (RegXMM): New for P/III.
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| D | ChangeLog-0001 | 3742 SReg2, SReg3, Acc, JumpAbsolute, RegMMX, RegXMM, EsSeg, InvMem):
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