| /toolchain/binutils/binutils-2.25/opcodes/ |
| D | mips-formats.h | 21 #define INT_ADJ(SIZE, LSB, MAX_VAL, SHIFT, PRINT_HEX) \ argument
24 { OP_INT, SIZE, LSB }, MAX_VAL, 0, SHIFT, PRINT_HEX \
122 #define PCREL(SIZE, LSB, IS_SIGNED, SHIFT, ALIGN_LOG2, INCLUDE_ISA_BIT, \ argument
127 (1 << ((SIZE) - (IS_SIGNED))) - 1, 0, SHIFT, TRUE }, \
133 #define JUMP(SIZE, LSB, SHIFT) \ argument
134 PCREL (SIZE, LSB, FALSE, SHIFT, SIZE + SHIFT, TRUE, FALSE)
136 #define JALX(SIZE, LSB, SHIFT) \ argument
137 PCREL (SIZE, LSB, FALSE, SHIFT, SIZE + SHIFT, TRUE, TRUE)
139 #define BRANCH(SIZE, LSB, SHIFT) \ argument
140 PCREL (SIZE, LSB, TRUE, SHIFT, 0, TRUE, FALSE)
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| D | crx-opc.c | 428 #define CSTBIT_INST(NAME, OP, OPC1, DIFF, SHIFT, OPC2) \ argument
434 {NAME, 2, OPC1+0*DIFF, SHIFT, CSTBIT_INS, {{OP,16}, {abs16,0}}}, \
436 {NAME, 3, OPC1+1*DIFF, SHIFT, CSTBIT_INS, {{OP,16}, {abs32,0}}}, \
438 {NAME, 1, OPC2, SHIFT+4, CSTBIT_INS, {{OP,20}, {rbase,16}}}, \
440 {NAME, 2, OPC1+2*DIFF, SHIFT, CSTBIT_INS, {{OP,16}, {rbase_disps12,12}}}, \
442 {NAME, 3, OPC1+3*DIFF, SHIFT, CSTBIT_INS, {{OP,16}, {rbase_disps28,12}}}, \
444 {NAME, 2, OPC1+4*DIFF, SHIFT, CSTBIT_INS, {{OP,16}, {rindex_disps6,0}}}, \
446 {NAME, 3, OPC1+5*DIFF, SHIFT, CSTBIT_INS, {{OP,16}, {rindex_disps22,0}}}
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| D | cr16-opc.c | 138 #define SHIFT_INST_A(NAME, OPC1, OPC2, SHIFT, OP1, OP2) \ argument
140 {NAME, 1, OPC1, SHIFT, SHIFT_INS, {{OP1,20}, {OP2,16}}}, \
142 {NAME, 1, OPC1+1, SHIFT, SHIFT_INS, {{OP1,20}, {OP2,16}}},\
150 #define SHIFT_INST_L(NAME, OPC1, OPC2, SHIFT, OP1, OP2) \ argument
152 {NAME, 1, OPC1, SHIFT, SHIFT_INS, {{OP1,20}, {OP2,16}}}, \
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| D | epiphany-opc.c | 1243 { { MNEM, ' ', OP (RD), ',', OP (RN), ',', OP (SHIFT), 0 } },
1249 { { MNEM, ' ', OP (RD6), ',', OP (RN6), ',', OP (SHIFT), 0 } },
1255 { { MNEM, ' ', OP (RD), ',', OP (RN), ',', OP (SHIFT), 0 } },
1261 { { MNEM, ' ', OP (RD6), ',', OP (RN6), ',', OP (SHIFT), 0 } },
1267 { { MNEM, ' ', OP (RD), ',', OP (RN), ',', OP (SHIFT), 0 } },
1273 { { MNEM, ' ', OP (RD6), ',', OP (RN6), ',', OP (SHIFT), 0 } },
3699 { { MNEM, ' ', OP (RD6), ',', OP (RN6), ',', OP (SHIFT), 0 } },
3705 { { MNEM, ' ', OP (RD6), ',', OP (RN6), ',', OP (SHIFT), 0 } },
3711 { { MNEM, ' ', OP (RD6), ',', OP (RN6), ',', OP (SHIFT), 0 } },
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| D | tic54x-dis.c | 322 shift = SHIFT (ext ? opcode2 : opcode); in print_instruction()
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| D | rx-decode.opc | 665 /* SHIFT */
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| D | ChangeLog-2010 | 287 LSHIFT instead of SHIFT.
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/tic54x/ |
| D | opcodes.s | 14 add *ar3+, a, b ; Smem [,SHIFT], src [,dst] (-16<=SHIFT<=15)
22 add a,-16,b ; src [,SHIFT][,dst]
33 and a ; src[,SHIFT][,dst]
103 ld *ar3+,1,a ; Smem[,SHIFT],dst
112 ld a,1,b ; src[,SHIFT],dst
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| /toolchain/binutils/binutils-2.25/include/opcode/ |
| D | crx.h | 400 #define BIN(OPC,SHIFT) (OPC << SHIFT) argument
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| D | cr16.h | 414 #define BIN(OPC,SHIFT) (OPC << SHIFT) argument
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| D | tic54x.h | 103 #define SHIFT(OP) (((OP)&0x10)?(((OP)&0x1F)-32):((OP)&0x1F)) macro
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| /toolchain/binutils/binutils-2.25/gas/config/ |
| D | tc-crx.c | 50 #define CRX_PRINT(BYTE, NUM, SHIFT) output_opcode[BYTE] |= (NUM << SHIFT) argument
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| D | tc-cr16.c | 44 #define CR16_PRINT(BYTE, NUM, SHIFT) output_opcode[BYTE] |= (NUM << SHIFT) argument
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| D | bfin-lex.l | 73 [sS][hH][iI][fF][tT] return SHIFT;
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| D | bfin-parse.y | 517 %token SHIFT LSHIFT ASHIFT BXORSHIFT
2155 | REG ASSIGN SHIFT REG BY HALF_REG
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| D | tc-tic6x.c | 3773 #define MODIFY_VALUE(NEWVAL, VALUE, SHIFT, POS, BITS) \ argument
3776 (NEWVAL) |= (((VALUE) >> (SHIFT)) & ((1U << (BITS)) - 1)) << (POS); \
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| D | tc-mips.c | 1214 #define EXTRACT_BITS(STRUCT, MASK, SHIFT) \ argument
1215 (((STRUCT) >> (SHIFT)) & (MASK))
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| /toolchain/binutils/binutils-2.25/binutils/ |
| D | rclex.c | 101 K(SCROLLBAR), K(SEPARATOR), K(SHIFT), K(STATE3),
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| D | rcparse.y | 115 %token ACCELERATORS VIRTKEY ASCII NOINVERT SHIFT CONTROL ALT
311 | SHIFT
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| /toolchain/binutils/binutils-2.25/gas/testsuite/ |
| D | ChangeLog-2010 | 822 gas/bfin/vector.2, gas/bfin/vector2.d: Change SHIFT to LSHIFT.
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