Searched refs:SR1 (Results 1 – 2 of 2) sorted by relevance
| /toolchain/binutils/binutils-2.25/opcodes/ |
| D | v850-opc.c | 1049 #define SR1 (OLDSR1 + 1) macro
1053 #define OLDSR2 (SR1 + 1)
1761 { "stsr", two (0x07e0, 0x0040), two (0x07e0, 0x07ff), {SR1, R2, SELID}, 0, PROCESSOR_V850E3V5_UP },
1762 { "stsr", two (0x07e0, 0x0040), two (0x07e0, 0x07ff), {SR1, R2}, 0, PROCESSOR_V850E3V5_UP },
1766 { "sttc.sr", two (0x07e0, 0x0050), two (0x07e0, 0x07ff), {SR1, R2, SELID}, 0, PROCESSOR_V850E3V5_U…
1767 { "sttc.sr", two (0x07e0, 0x0050), two (0x07e0, 0x07ff), {SR1, R2}, 0, PROCESSOR_V850E3V5_UP },
1771 { "stvc.sr", two (0x07e0, 0x0054), two (0x07e0, 0x07ff), {SR1, R2, SELID}, 0, PROCESSOR_V850E3V5_U…
1772 { "stvc.sr", two (0x07e0, 0x0054), two (0x07e0, 0x07ff), {SR1, R2}, 0, PROCESSOR_V850E3V5_UP },
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| D | ChangeLog-9297 | 1644 * v850-opc.c (v850_operands): Add "SR1" and "SR2" for system
1646 (v850_opcodes): Use SR1 and SR2 for "ldsr" and "stsr".
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