1 /* MIPS ELF support for BFD.
2    Copyright (C) 1993-2014 Free Software Foundation, Inc.
3 
4    By Ian Lance Taylor, Cygnus Support, <ian@cygnus.com>, from
5    information in the System V Application Binary Interface, MIPS
6    Processor Supplement.
7 
8    This file is part of BFD, the Binary File Descriptor library.
9 
10    This program is free software; you can redistribute it and/or modify
11    it under the terms of the GNU General Public License as published by
12    the Free Software Foundation; either version 3 of the License, or
13    (at your option) any later version.
14 
15    This program is distributed in the hope that it will be useful,
16    but WITHOUT ANY WARRANTY; without even the implied warranty of
17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18    GNU General Public License for more details.
19 
20    You should have received a copy of the GNU General Public License
21    along with this program; if not, write to the Free Software
22    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
23    MA 02110-1301, USA.  */
24 
25 /* This file holds definitions specific to the MIPS ELF ABI.  Note
26    that most of this is not actually implemented by BFD.  */
27 
28 #ifndef _ELF_MIPS_H
29 #define _ELF_MIPS_H
30 
31 #include "elf/reloc-macros.h"
32 
33 /* Relocation types.  */
34 START_RELOC_NUMBERS (elf_mips_reloc_type)
35   RELOC_NUMBER (R_MIPS_NONE, 0)
36   RELOC_NUMBER (R_MIPS_16, 1)
37   RELOC_NUMBER (R_MIPS_32, 2)		/* In Elf 64: alias R_MIPS_ADD */
38   RELOC_NUMBER (R_MIPS_REL32, 3)	/* In Elf 64: alias R_MIPS_REL */
39   RELOC_NUMBER (R_MIPS_26, 4)
40   RELOC_NUMBER (R_MIPS_HI16, 5)
41   RELOC_NUMBER (R_MIPS_LO16, 6)
42   RELOC_NUMBER (R_MIPS_GPREL16, 7)	/* In Elf 64: alias R_MIPS_GPREL */
43   RELOC_NUMBER (R_MIPS_LITERAL, 8)
44   RELOC_NUMBER (R_MIPS_GOT16, 9)	/* In Elf 64: alias R_MIPS_GOT */
45   RELOC_NUMBER (R_MIPS_PC16, 10)
46   RELOC_NUMBER (R_MIPS_CALL16, 11)	/* In Elf 64: alias R_MIPS_CALL */
47   RELOC_NUMBER (R_MIPS_GPREL32, 12)
48   /* The remaining relocs are defined on Irix, although they are not
49      in the MIPS ELF ABI.  */
50   RELOC_NUMBER (R_MIPS_UNUSED1, 13)
51   RELOC_NUMBER (R_MIPS_UNUSED2, 14)
52   RELOC_NUMBER (R_MIPS_UNUSED3, 15)
53   RELOC_NUMBER (R_MIPS_SHIFT5, 16)
54   RELOC_NUMBER (R_MIPS_SHIFT6, 17)
55   RELOC_NUMBER (R_MIPS_64, 18)
56   RELOC_NUMBER (R_MIPS_GOT_DISP, 19)
57   RELOC_NUMBER (R_MIPS_GOT_PAGE, 20)
58   RELOC_NUMBER (R_MIPS_GOT_OFST, 21)
59   RELOC_NUMBER (R_MIPS_GOT_HI16, 22)
60   RELOC_NUMBER (R_MIPS_GOT_LO16, 23)
61   RELOC_NUMBER (R_MIPS_SUB, 24)
62   RELOC_NUMBER (R_MIPS_INSERT_A, 25)
63   RELOC_NUMBER (R_MIPS_INSERT_B, 26)
64   RELOC_NUMBER (R_MIPS_DELETE, 27)
65   RELOC_NUMBER (R_MIPS_HIGHER, 28)
66   RELOC_NUMBER (R_MIPS_HIGHEST, 29)
67   RELOC_NUMBER (R_MIPS_CALL_HI16, 30)
68   RELOC_NUMBER (R_MIPS_CALL_LO16, 31)
69   RELOC_NUMBER (R_MIPS_SCN_DISP, 32)
70   RELOC_NUMBER (R_MIPS_REL16, 33)
71   RELOC_NUMBER (R_MIPS_ADD_IMMEDIATE, 34)
72   RELOC_NUMBER (R_MIPS_PJUMP, 35)
73   RELOC_NUMBER (R_MIPS_RELGOT, 36)
74   RELOC_NUMBER (R_MIPS_JALR, 37)
75   /* TLS relocations.  */
76   RELOC_NUMBER (R_MIPS_TLS_DTPMOD32, 38)
77   RELOC_NUMBER (R_MIPS_TLS_DTPREL32, 39)
78   RELOC_NUMBER (R_MIPS_TLS_DTPMOD64, 40)
79   RELOC_NUMBER (R_MIPS_TLS_DTPREL64, 41)
80   RELOC_NUMBER (R_MIPS_TLS_GD, 42)
81   RELOC_NUMBER (R_MIPS_TLS_LDM, 43)
82   RELOC_NUMBER (R_MIPS_TLS_DTPREL_HI16, 44)
83   RELOC_NUMBER (R_MIPS_TLS_DTPREL_LO16, 45)
84   RELOC_NUMBER (R_MIPS_TLS_GOTTPREL, 46)
85   RELOC_NUMBER (R_MIPS_TLS_TPREL32, 47)
86   RELOC_NUMBER (R_MIPS_TLS_TPREL64, 48)
87   RELOC_NUMBER (R_MIPS_TLS_TPREL_HI16, 49)
88   RELOC_NUMBER (R_MIPS_TLS_TPREL_LO16, 50)
89   RELOC_NUMBER (R_MIPS_GLOB_DAT, 51)
90   /* Space to grow */
91   RELOC_NUMBER (R_MIPS_PC21_S2, 60)
92   RELOC_NUMBER (R_MIPS_PC26_S2, 61)
93   RELOC_NUMBER (R_MIPS_PC18_S3, 62)
94   RELOC_NUMBER (R_MIPS_PC19_S2, 63)
95   RELOC_NUMBER (R_MIPS_PCHI16, 64)
96   RELOC_NUMBER (R_MIPS_PCLO16, 65)
97   FAKE_RELOC (R_MIPS_max, 66)
98   /* These relocs are used for the mips16.  */
99   FAKE_RELOC (R_MIPS16_min, 100)
100   RELOC_NUMBER (R_MIPS16_26, 100)
101   RELOC_NUMBER (R_MIPS16_GPREL, 101)
102   RELOC_NUMBER (R_MIPS16_GOT16, 102)
103   RELOC_NUMBER (R_MIPS16_CALL16, 103)
104   RELOC_NUMBER (R_MIPS16_HI16, 104)
105   RELOC_NUMBER (R_MIPS16_LO16, 105)
106   RELOC_NUMBER (R_MIPS16_TLS_GD, 106)
107   RELOC_NUMBER (R_MIPS16_TLS_LDM, 107)
108   RELOC_NUMBER (R_MIPS16_TLS_DTPREL_HI16, 108)
109   RELOC_NUMBER (R_MIPS16_TLS_DTPREL_LO16, 109)
110   RELOC_NUMBER (R_MIPS16_TLS_GOTTPREL, 110)
111   RELOC_NUMBER (R_MIPS16_TLS_TPREL_HI16, 111)
112   RELOC_NUMBER (R_MIPS16_TLS_TPREL_LO16, 112)
113   FAKE_RELOC (R_MIPS16_max, 113)
114   /* These relocations are specific to VxWorks.  */
115   RELOC_NUMBER (R_MIPS_COPY, 126)
116   RELOC_NUMBER (R_MIPS_JUMP_SLOT, 127)
117 
118   /* These relocations are specific to microMIPS.  */
119   FAKE_RELOC (R_MICROMIPS_min, 130)
120   RELOC_NUMBER (R_MICROMIPS_26_S1, 133)
121   RELOC_NUMBER (R_MICROMIPS_HI16, 134)
122   RELOC_NUMBER (R_MICROMIPS_LO16, 135)
123   RELOC_NUMBER (R_MICROMIPS_GPREL16, 136)	/* In Elf 64:
124 						   alias R_MICROMIPS_GPREL */
125   RELOC_NUMBER (R_MICROMIPS_LITERAL, 137)
126   RELOC_NUMBER (R_MICROMIPS_GOT16, 138)		/* In Elf 64:
127 						   alias R_MICROMIPS_GOT */
128   RELOC_NUMBER (R_MICROMIPS_PC7_S1, 139)
129   RELOC_NUMBER (R_MICROMIPS_PC10_S1, 140)
130   RELOC_NUMBER (R_MICROMIPS_PC16_S1, 141)
131   RELOC_NUMBER (R_MICROMIPS_CALL16, 142)	/* In Elf 64:
132 						   alias R_MICROMIPS_CALL */
133   RELOC_NUMBER (R_MICROMIPS_GOT_DISP, 145)
134   RELOC_NUMBER (R_MICROMIPS_GOT_PAGE, 146)
135   RELOC_NUMBER (R_MICROMIPS_GOT_OFST, 147)
136   RELOC_NUMBER (R_MICROMIPS_GOT_HI16, 148)
137   RELOC_NUMBER (R_MICROMIPS_GOT_LO16, 149)
138   RELOC_NUMBER (R_MICROMIPS_SUB, 150)
139   RELOC_NUMBER (R_MICROMIPS_HIGHER, 151)
140   RELOC_NUMBER (R_MICROMIPS_HIGHEST, 152)
141   RELOC_NUMBER (R_MICROMIPS_CALL_HI16, 153)
142   RELOC_NUMBER (R_MICROMIPS_CALL_LO16, 154)
143   RELOC_NUMBER (R_MICROMIPS_SCN_DISP, 155)
144   RELOC_NUMBER (R_MICROMIPS_JALR, 156)
145   RELOC_NUMBER (R_MICROMIPS_HI0_LO16, 157)
146   /* TLS relocations.  */
147   RELOC_NUMBER (R_MICROMIPS_TLS_GD, 162)
148   RELOC_NUMBER (R_MICROMIPS_TLS_LDM, 163)
149   RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_HI16, 164)
150   RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_LO16, 165)
151   RELOC_NUMBER (R_MICROMIPS_TLS_GOTTPREL, 166)
152   RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_HI16, 169)
153   RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_LO16, 170)
154   /* microMIPS GP- and PC-relative relocations. */
155   RELOC_NUMBER (R_MICROMIPS_GPREL7_S2, 172)
156   RELOC_NUMBER (R_MICROMIPS_PC23_S2, 173)
157   FAKE_RELOC (R_MICROMIPS_max, 174)
158 
159   /* This was a GNU extension used by embedded-PIC.  It was co-opted by
160      mips-linux for exception-handling data.  GCC stopped using it in
161      May, 2004, then started using it again for compact unwind tables.  */
162   RELOC_NUMBER (R_MIPS_PC32, 248)
163   RELOC_NUMBER (R_MIPS_EH, 249)
164   /* FIXME: this relocation is used internally by gas.  */
165   RELOC_NUMBER (R_MIPS_GNU_REL16_S2, 250)
166   /* These are GNU extensions to enable C++ vtable garbage collection.  */
167   RELOC_NUMBER (R_MIPS_GNU_VTINHERIT, 253)
168   RELOC_NUMBER (R_MIPS_GNU_VTENTRY, 254)
169 END_RELOC_NUMBERS (R_MIPS_maxext)
170 
171 /* Processor specific flags for the ELF header e_flags field.  */
172 
173 /* At least one .noreorder directive appears in the source.  */
174 #define EF_MIPS_NOREORDER	0x00000001
175 
176 /* File contains position independent code.  */
177 #define EF_MIPS_PIC		0x00000002
178 
179 /* Code in file uses the standard calling sequence for calling
180    position independent code.  */
181 #define EF_MIPS_CPIC		0x00000004
182 
183 /* ???  Unknown flag, set in IRIX 6's BSDdup2.o in libbsd.a.  */
184 #define EF_MIPS_XGOT		0x00000008
185 
186 /* Code in file uses UCODE (obsolete) */
187 #define EF_MIPS_UCODE		0x00000010
188 
189 /* Code in file uses new ABI (-n32 on Irix 6).  */
190 #define EF_MIPS_ABI2		0x00000020
191 
192 /* Process the .MIPS.options section first by ld */
193 #define EF_MIPS_OPTIONS_FIRST	0x00000080
194 
195 /* Indicates code compiled for a 64-bit machine in 32-bit mode
196    (regs are 32-bits wide).  */
197 #define EF_MIPS_32BITMODE	0x00000100
198 
199 /* 32-bit machine but FP registers are 64 bit (-mfp64).  */
200 #define EF_MIPS_FP64		0x00000200
201 
202 /* Code in file uses the IEEE 754-2008 NaN encoding convention.  */
203 #define EF_MIPS_NAN2008		0x00000400
204 
205 /* Architectural Extensions used by this file */
206 #define EF_MIPS_ARCH_ASE	0x0f000000
207 
208 /* Use MDMX multimedia extensions */
209 #define EF_MIPS_ARCH_ASE_MDMX	0x08000000
210 
211 /* Use MIPS-16 ISA extensions */
212 #define EF_MIPS_ARCH_ASE_M16	0x04000000
213 
214 /* Use MICROMIPS ISA extensions.  */
215 #define EF_MIPS_ARCH_ASE_MICROMIPS	0x02000000
216 
217 /* Four bit MIPS architecture field.  */
218 #define EF_MIPS_ARCH		0xf0000000
219 
220 /* -mips1 code.  */
221 #define E_MIPS_ARCH_1		0x00000000
222 
223 /* -mips2 code.  */
224 #define E_MIPS_ARCH_2		0x10000000
225 
226 /* -mips3 code.  */
227 #define E_MIPS_ARCH_3		0x20000000
228 
229 /* -mips4 code.  */
230 #define E_MIPS_ARCH_4		0x30000000
231 
232 /* -mips5 code.  */
233 #define E_MIPS_ARCH_5           0x40000000
234 
235 /* -mips32 code.  */
236 #define E_MIPS_ARCH_32          0x50000000
237 
238 /* -mips64 code.  */
239 #define E_MIPS_ARCH_64          0x60000000
240 
241 /* -mips32r2 code.  */
242 #define E_MIPS_ARCH_32R2        0x70000000
243 
244 /* -mips64r2 code.  */
245 #define E_MIPS_ARCH_64R2        0x80000000
246 
247 /* -mips32r6 code.  */
248 #define E_MIPS_ARCH_32R6        0x90000000
249 
250 /* -mips64r6 code.  */
251 #define E_MIPS_ARCH_64R6        0xa0000000
252 
253 /* The ABI of the file.  Also see EF_MIPS_ABI2 above. */
254 #define EF_MIPS_ABI		0x0000F000
255 
256 /* The original o32 abi. */
257 #define E_MIPS_ABI_O32          0x00001000
258 
259 /* O32 extended to work on 64 bit architectures */
260 #define E_MIPS_ABI_O64          0x00002000
261 
262 /* EABI in 32 bit mode */
263 #define E_MIPS_ABI_EABI32       0x00003000
264 
265 /* EABI in 64 bit mode */
266 #define E_MIPS_ABI_EABI64       0x00004000
267 
268 
269 /* Machine variant if we know it.  This field was invented at Cygnus,
270    but it is hoped that other vendors will adopt it.  If some standard
271    is developed, this code should be changed to follow it. */
272 
273 #define EF_MIPS_MACH		0x00FF0000
274 
275 /* Cygnus is choosing values between 80 and 9F;
276    00 - 7F should be left for a future standard;
277    the rest are open. */
278 
279 #define E_MIPS_MACH_3900	0x00810000
280 #define E_MIPS_MACH_4010	0x00820000
281 #define E_MIPS_MACH_4100	0x00830000
282 #define E_MIPS_MACH_4650	0x00850000
283 #define E_MIPS_MACH_4120	0x00870000
284 #define E_MIPS_MACH_4111	0x00880000
285 #define E_MIPS_MACH_SB1         0x008a0000
286 #define E_MIPS_MACH_OCTEON	0x008b0000
287 #define E_MIPS_MACH_XLR     	0x008c0000
288 #define E_MIPS_MACH_OCTEON2	0x008d0000
289 #define E_MIPS_MACH_OCTEON3	0x008e0000
290 #define E_MIPS_MACH_5400	0x00910000
291 #define E_MIPS_MACH_5900	0x00920000
292 #define E_MIPS_MACH_5500	0x00980000
293 #define E_MIPS_MACH_9000	0x00990000
294 #define E_MIPS_MACH_LS2E        0x00A00000
295 #define E_MIPS_MACH_LS2F        0x00A10000
296 #define E_MIPS_MACH_LS3A        0x00A20000
297 
298 /* Processor specific section indices.  These sections do not actually
299    exist.  Symbols with a st_shndx field corresponding to one of these
300    values have a special meaning.  */
301 
302 /* Defined and allocated common symbol.  Value is virtual address.  If
303    relocated, alignment must be preserved.  */
304 #define SHN_MIPS_ACOMMON	SHN_LORESERVE
305 
306 /* Defined and allocated text symbol.  Value is virtual address.
307    Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables.  */
308 #define SHN_MIPS_TEXT		(SHN_LORESERVE + 1)
309 
310 /* Defined and allocated data symbol.  Value is virtual address.
311    Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables.  */
312 #define SHN_MIPS_DATA		(SHN_LORESERVE + 2)
313 
314 /* Small common symbol.  */
315 #define SHN_MIPS_SCOMMON	(SHN_LORESERVE + 3)
316 
317 /* Small undefined symbol.  */
318 #define SHN_MIPS_SUNDEFINED	(SHN_LORESERVE + 4)
319 
320 /* Processor specific section types.  */
321 
322 /* Section contains the set of dynamic shared objects used when
323    statically linking.  */
324 #define SHT_MIPS_LIBLIST	0x70000000
325 
326 /* I'm not sure what this is, but it's used on Irix 5.  */
327 #define SHT_MIPS_MSYM		0x70000001
328 
329 /* Section contains list of symbols whose definitions conflict with
330    symbols defined in shared objects.  */
331 #define SHT_MIPS_CONFLICT	0x70000002
332 
333 /* Section contains the global pointer table.  */
334 #define SHT_MIPS_GPTAB		0x70000003
335 
336 /* Section contains microcode information.  The exact format is
337    unspecified.  */
338 #define SHT_MIPS_UCODE		0x70000004
339 
340 /* Section contains some sort of debugging information.  The exact
341    format is unspecified.  It's probably ECOFF symbols.  */
342 #define SHT_MIPS_DEBUG		0x70000005
343 
344 /* Section contains register usage information.  */
345 #define SHT_MIPS_REGINFO	0x70000006
346 
347 /* ??? */
348 #define SHT_MIPS_PACKAGE	0x70000007
349 
350 /* ??? */
351 #define SHT_MIPS_PACKSYM	0x70000008
352 
353 /* ??? */
354 #define SHT_MIPS_RELD		0x70000009
355 
356 /* Section contains interface information.  */
357 #define SHT_MIPS_IFACE		0x7000000b
358 
359 /* Section contains description of contents of another section.  */
360 #define SHT_MIPS_CONTENT	0x7000000c
361 
362 /* Section contains miscellaneous options.  */
363 #define SHT_MIPS_OPTIONS	0x7000000d
364 
365 /* ??? */
366 #define SHT_MIPS_SHDR		0x70000010
367 
368 /* ??? */
369 #define SHT_MIPS_FDESC		0x70000011
370 
371 /* ??? */
372 #define SHT_MIPS_EXTSYM		0x70000012
373 
374 /* ??? */
375 #define SHT_MIPS_DENSE		0x70000013
376 
377 /* ??? */
378 #define SHT_MIPS_PDESC		0x70000014
379 
380 /* ??? */
381 #define SHT_MIPS_LOCSYM		0x70000015
382 
383 /* ??? */
384 #define SHT_MIPS_AUXSYM		0x70000016
385 
386 /* ??? */
387 #define SHT_MIPS_OPTSYM		0x70000017
388 
389 /* ??? */
390 #define SHT_MIPS_LOCSTR		0x70000018
391 
392 /* ??? */
393 #define SHT_MIPS_LINE		0x70000019
394 
395 /* ??? */
396 #define SHT_MIPS_RFDESC		0x7000001a
397 
398 /* Delta C++: symbol table */
399 #define SHT_MIPS_DELTASYM	0x7000001b
400 
401 /* Delta C++: instance table */
402 #define SHT_MIPS_DELTAINST	0x7000001c
403 
404 /* Delta C++: class table */
405 #define SHT_MIPS_DELTACLASS	0x7000001d
406 
407 /* DWARF debugging section.  */
408 #define SHT_MIPS_DWARF		0x7000001e
409 
410 /* Delta C++: declarations */
411 #define SHT_MIPS_DELTADECL	0x7000001f
412 
413 /* List of libraries the binary depends on.  Includes a time stamp, version
414    number.  */
415 #define SHT_MIPS_SYMBOL_LIB	0x70000020
416 
417 /* Events section.  */
418 #define SHT_MIPS_EVENTS		0x70000021
419 
420 /* ??? */
421 #define SHT_MIPS_TRANSLATE	0x70000022
422 
423 /* Special pixie sections */
424 #define SHT_MIPS_PIXIE		0x70000023
425 
426 /* Address translation table (for debug info) */
427 #define SHT_MIPS_XLATE		0x70000024
428 
429 /* SGI internal address translation table (for debug info) */
430 #define SHT_MIPS_XLATE_DEBUG	0x70000025
431 
432 /* Intermediate code */
433 #define SHT_MIPS_WHIRL		0x70000026
434 
435 /* C++ exception handling region info */
436 #define SHT_MIPS_EH_REGION	0x70000027
437 
438 /* Obsolete address translation table (for debug info) */
439 #define SHT_MIPS_XLATE_OLD	0x70000028
440 
441 /* Runtime procedure descriptor table exception information (ucode) ??? */
442 #define SHT_MIPS_PDR_EXCEPTION	0x70000029
443 
444 /* ABI related flags section.  */
445 #define SHT_MIPS_ABIFLAGS	0x7000002a
446 
447 /* A section of type SHT_MIPS_LIBLIST contains an array of the
448    following structure.  The sh_link field is the section index of the
449    string table.  The sh_info field is the number of entries in the
450    section.  */
451 typedef struct
452 {
453   /* String table index for name of shared object.  */
454   unsigned long l_name;
455   /* Time stamp.  */
456   unsigned long l_time_stamp;
457   /* Checksum of symbol names and common sizes.  */
458   unsigned long l_checksum;
459   /* String table index for version.  */
460   unsigned long l_version;
461   /* Flags.  */
462   unsigned long l_flags;
463 } Elf32_Lib;
464 
465 /* The external version of Elf32_Lib.  */
466 typedef struct
467 {
468   unsigned char l_name[4];
469   unsigned char l_time_stamp[4];
470   unsigned char l_checksum[4];
471   unsigned char l_version[4];
472   unsigned char l_flags[4];
473 } Elf32_External_Lib;
474 
475 /* The l_flags field of an Elf32_Lib structure may contain the
476    following flags.  */
477 
478 /* Require an exact match at runtime.  */
479 #define LL_EXACT_MATCH		0x00000001
480 
481 /* Ignore version incompatibilities at runtime.  */
482 #define LL_IGNORE_INT_VER	0x00000002
483 
484 /* Require matching minor version number.  */
485 #define LL_REQUIRE_MINOR	0x00000004
486 
487 /* ??? */
488 #define LL_EXPORTS		0x00000008
489 
490 /* Delay loading of this library until really needed.  */
491 #define LL_DELAY_LOAD		0x00000010
492 
493 /* ??? Delta C++ stuff ??? */
494 #define LL_DELTA		0x00000020
495 
496 
497 /* A section of type SHT_MIPS_CONFLICT is an array of indices into the
498    .dynsym section.  Each element has the following type.  */
499 typedef unsigned long Elf32_Conflict;
500 typedef unsigned char Elf32_External_Conflict[4];
501 
502 typedef unsigned long Elf64_Conflict;
503 typedef unsigned char Elf64_External_Conflict[8];
504 
505 /* A section of type SHT_MIPS_GPTAB contains information about how
506    much GP space would be required for different -G arguments.  This
507    information is only used so that the linker can provide informative
508    suggestions as to the best -G value to use.  The sh_info field is
509    the index of the section for which this information applies.  The
510    contents of the section are an array of the following union.  The
511    first element uses the gt_header field.  The remaining elements use
512    the gt_entry field.  */
513 typedef union
514 {
515   struct
516     {
517       /* -G value actually used for this object file.  */
518       unsigned long gt_current_g_value;
519       /* Unused.  */
520       unsigned long gt_unused;
521     } gt_header;
522   struct
523     {
524       /* If this -G argument has been used...  */
525       unsigned long gt_g_value;
526       /* ...this many GP section bytes would be required.  */
527       unsigned long gt_bytes;
528     } gt_entry;
529 } Elf32_gptab;
530 
531 /* The external version of Elf32_gptab.  */
532 
533 typedef union
534 {
535   struct
536     {
537       unsigned char gt_current_g_value[4];
538       unsigned char gt_unused[4];
539     } gt_header;
540   struct
541     {
542       unsigned char gt_g_value[4];
543       unsigned char gt_bytes[4];
544     } gt_entry;
545 } Elf32_External_gptab;
546 
547 /* A section of type SHT_MIPS_REGINFO contains the following
548    structure.  */
549 typedef struct
550 {
551   /* Mask of general purpose registers used.  */
552   unsigned long ri_gprmask;
553   /* Mask of co-processor registers used.  */
554   unsigned long ri_cprmask[4];
555   /* GP register value for this object file.  */
556   long ri_gp_value;
557 } Elf32_RegInfo;
558 
559 /* The external version of the Elf_RegInfo structure.  */
560 typedef struct
561 {
562   unsigned char ri_gprmask[4];
563   unsigned char ri_cprmask[4][4];
564   unsigned char ri_gp_value[4];
565 } Elf32_External_RegInfo;
566 
567 /* MIPS ELF .reginfo swapping routines.  */
568 extern void bfd_mips_elf32_swap_reginfo_in
569   (bfd *, const Elf32_External_RegInfo *, Elf32_RegInfo *);
570 extern void bfd_mips_elf32_swap_reginfo_out
571   (bfd *, const Elf32_RegInfo *, Elf32_External_RegInfo *);
572 
573 /* Processor specific section flags.  */
574 
575 /* This section must be in the global data area.  */
576 #define SHF_MIPS_GPREL		0x10000000
577 
578 /* This section should be merged.  */
579 #define SHF_MIPS_MERGE		0x20000000
580 
581 /* This section contains address data of size implied by section
582    element size.  */
583 #define SHF_MIPS_ADDR		0x40000000
584 
585 /* This section contains string data.  */
586 #define SHF_MIPS_STRING		0x80000000
587 
588 /* This section may not be stripped.  */
589 #define SHF_MIPS_NOSTRIP	0x08000000
590 
591 /* This section is local to threads.  */
592 #define SHF_MIPS_LOCAL		0x04000000
593 
594 /* Linker should generate implicit weak names for this section.  */
595 #define SHF_MIPS_NAMES		0x02000000
596 
597 /* Section contais text/data which may be replicated in other sections.
598    Linker should retain only one copy.  */
599 #define SHF_MIPS_NODUPES	0x01000000
600 
601 /* Processor specific program header types.  */
602 
603 /* Register usage information.  Identifies one .reginfo section.  */
604 #define PT_MIPS_REGINFO		0x70000000
605 
606 /* Runtime procedure table.  */
607 #define PT_MIPS_RTPROC		0x70000001
608 
609 /* .MIPS.options section.  */
610 #define PT_MIPS_OPTIONS		0x70000002
611 
612 /* Records ABI related flags.  */
613 #define PT_MIPS_ABIFLAGS	0x70000003
614 
615 /* Processor specific dynamic array tags.  */
616 
617 /* 32 bit version number for runtime linker interface.  */
618 #define DT_MIPS_RLD_VERSION	0x70000001
619 
620 /* Time stamp.  */
621 #define DT_MIPS_TIME_STAMP	0x70000002
622 
623 /* Checksum of external strings and common sizes.  */
624 #define DT_MIPS_ICHECKSUM	0x70000003
625 
626 /* Index of version string in string table.  */
627 #define DT_MIPS_IVERSION	0x70000004
628 
629 /* 32 bits of flags.  */
630 #define DT_MIPS_FLAGS		0x70000005
631 
632 /* Base address of the segment.  */
633 #define DT_MIPS_BASE_ADDRESS	0x70000006
634 
635 /* ??? */
636 #define DT_MIPS_MSYM		0x70000007
637 
638 /* Address of .conflict section.  */
639 #define DT_MIPS_CONFLICT	0x70000008
640 
641 /* Address of .liblist section.  */
642 #define DT_MIPS_LIBLIST		0x70000009
643 
644 /* Number of local global offset table entries.  */
645 #define DT_MIPS_LOCAL_GOTNO	0x7000000a
646 
647 /* Number of entries in the .conflict section.  */
648 #define DT_MIPS_CONFLICTNO	0x7000000b
649 
650 /* Number of entries in the .liblist section.  */
651 #define DT_MIPS_LIBLISTNO	0x70000010
652 
653 /* Number of entries in the .dynsym section.  */
654 #define DT_MIPS_SYMTABNO	0x70000011
655 
656 /* Index of first external dynamic symbol not referenced locally.  */
657 #define DT_MIPS_UNREFEXTNO	0x70000012
658 
659 /* Index of first dynamic symbol in global offset table.  */
660 #define DT_MIPS_GOTSYM		0x70000013
661 
662 /* Number of page table entries in global offset table.  */
663 #define DT_MIPS_HIPAGENO	0x70000014
664 
665 /* Address of run time loader map, used for debugging.  */
666 #define DT_MIPS_RLD_MAP		0x70000016
667 
668 /* Delta C++ class definition.  */
669 #define DT_MIPS_DELTA_CLASS	0x70000017
670 
671 /* Number of entries in DT_MIPS_DELTA_CLASS.  */
672 #define DT_MIPS_DELTA_CLASS_NO	0x70000018
673 
674 /* Delta C++ class instances.  */
675 #define DT_MIPS_DELTA_INSTANCE	0x70000019
676 
677 /* Number of entries in DT_MIPS_DELTA_INSTANCE.  */
678 #define DT_MIPS_DELTA_INSTANCE_NO	0x7000001a
679 
680 /* Delta relocations.  */
681 #define DT_MIPS_DELTA_RELOC	0x7000001b
682 
683 /* Number of entries in DT_MIPS_DELTA_RELOC.  */
684 #define DT_MIPS_DELTA_RELOC_NO	0x7000001c
685 
686 /* Delta symbols that Delta relocations refer to.  */
687 #define DT_MIPS_DELTA_SYM	0x7000001d
688 
689 /* Number of entries in DT_MIPS_DELTA_SYM.  */
690 #define DT_MIPS_DELTA_SYM_NO	0x7000001e
691 
692 /* Delta symbols that hold class declarations.  */
693 #define DT_MIPS_DELTA_CLASSSYM	0x70000020
694 
695 /* Number of entries in DT_MIPS_DELTA_CLASSSYM.  */
696 #define DT_MIPS_DELTA_CLASSSYM_NO	0x70000021
697 
698 /* Flags indicating information about C++ flavor.  */
699 #define DT_MIPS_CXX_FLAGS	0x70000022
700 
701 /* Pixie information (???).  */
702 #define DT_MIPS_PIXIE_INIT	0x70000023
703 
704 /* Address of .MIPS.symlib */
705 #define DT_MIPS_SYMBOL_LIB	0x70000024
706 
707 /* The GOT index of the first PTE for a segment */
708 #define DT_MIPS_LOCALPAGE_GOTIDX	0x70000025
709 
710 /* The GOT index of the first PTE for a local symbol */
711 #define DT_MIPS_LOCAL_GOTIDX	0x70000026
712 
713 /* The GOT index of the first PTE for a hidden symbol */
714 #define DT_MIPS_HIDDEN_GOTIDX	0x70000027
715 
716 /* The GOT index of the first PTE for a protected symbol */
717 #define DT_MIPS_PROTECTED_GOTIDX	0x70000028
718 
719 /* Address of `.MIPS.options'.  */
720 #define DT_MIPS_OPTIONS		0x70000029
721 
722 /* Address of `.interface'.  */
723 #define DT_MIPS_INTERFACE	0x7000002a
724 
725 /* ??? */
726 #define DT_MIPS_DYNSTR_ALIGN	0x7000002b
727 
728 /* Size of the .interface section.  */
729 #define DT_MIPS_INTERFACE_SIZE	0x7000002c
730 
731 /* Size of rld_text_resolve function stored in the GOT.  */
732 #define DT_MIPS_RLD_TEXT_RESOLVE_ADDR	0x7000002d
733 
734 /* Default suffix of DSO to be added by rld on dlopen() calls.  */
735 #define DT_MIPS_PERF_SUFFIX	0x7000002e
736 
737 /* Size of compact relocation section (O32).  */
738 #define DT_MIPS_COMPACT_SIZE	0x7000002f
739 
740 /* GP value for auxiliary GOTs.  */
741 #define DT_MIPS_GP_VALUE	0x70000030
742 
743 /* Address of auxiliary .dynamic.  */
744 #define DT_MIPS_AUX_DYNAMIC	0x70000031
745 
746 /* Address of the base of the PLTGOT.  */
747 #define DT_MIPS_PLTGOT         0x70000032
748 
749 /* Points to the base of a writable PLT.  */
750 #define DT_MIPS_RWPLT          0x70000034
751 
752 /* Address of run time loader map, used for debugging.  */
753 #define DT_MIPS_RLD_MAP2       0x70000035
754 
755 /* Flags which may appear in a DT_MIPS_FLAGS entry.  */
756 
757 /* No flags.  */
758 #define RHF_NONE		0x00000000
759 
760 /* Uses shortcut pointers.  */
761 #define RHF_QUICKSTART		0x00000001
762 
763 /* Hash size is not a power of two.  */
764 #define RHF_NOTPOT		0x00000002
765 
766 /* Ignore LD_LIBRARY_PATH.  */
767 #define RHS_NO_LIBRARY_REPLACEMENT 0x00000004
768 
769 /* DSO address may not be relocated. */
770 #define RHF_NO_MOVE		0x00000008
771 
772 /* SGI specific features. */
773 #define RHF_SGI_ONLY		0x00000010
774 
775 /* Guarantee that .init will finish executing before any non-init
776    code in DSO is called. */
777 #define RHF_GUARANTEE_INIT	   0x00000020
778 
779 /* Contains Delta C++ code. */
780 #define RHF_DELTA_C_PLUS_PLUS	   0x00000040
781 
782 /* Guarantee that .init will start executing before any non-init
783    code in DSO is called. */
784 #define RHF_GUARANTEE_START_INIT   0x00000080
785 
786 /* Generated by pixie. */
787 #define RHF_PIXIE		   0x00000100
788 
789 /* Delay-load DSO by default. */
790 #define RHF_DEFAULT_DELAY_LOAD	   0x00000200
791 
792 /* Object may be requickstarted */
793 #define RHF_REQUICKSTART	   0x00000400
794 
795 /* Object has been requickstarted */
796 #define RHF_REQUICKSTARTED	   0x00000800
797 
798 /* Generated by cord. */
799 #define RHF_CORD		   0x00001000
800 
801 /* Object contains no unresolved undef symbols. */
802 #define RHF_NO_UNRES_UNDEF	   0x00002000
803 
804 /* Symbol table is in a safe order. */
805 #define RHF_RLD_ORDER_SAFE	   0x00004000
806 
807 /* Special values for the st_other field in the symbol table.  These
808    are used in an Irix 5 dynamic symbol table.  */
809 
810 #define STO_DEFAULT		STV_DEFAULT
811 #define STO_INTERNAL		STV_INTERNAL
812 #define STO_HIDDEN		STV_HIDDEN
813 #define STO_PROTECTED		STV_PROTECTED
814 
815 /* Two topmost bits denote the MIPS ISA for .text symbols:
816    + 00 -- standard MIPS code,
817    + 10 -- microMIPS code,
818    + 11 -- MIPS16 code; requires the following two bits to be set too.
819    Note that one of the MIPS16 bits overlaps with STO_MIPS_PIC.  See below
820    for details.  */
821 #define STO_MIPS_ISA		(3 << 6)
822 
823 /* The mask spanning the rest of MIPS psABI flags.  At most one is expected
824    to be set except for STO_MIPS16.  */
825 #define STO_MIPS_FLAGS		(~(STO_MIPS_ISA | ELF_ST_VISIBILITY (-1)))
826 
827 /* The MIPS psABI was updated in 2008 with support for PLTs and copy
828    relocs.  There are therefore two types of nonzero SHN_UNDEF functions:
829    PLT entries and traditional MIPS lazy binding stubs.  We mark the former
830    with STO_MIPS_PLT to distinguish them from the latter.  */
831 #define STO_MIPS_PLT		0x8
832 #define ELF_ST_IS_MIPS_PLT(other)					\
833   ((ELF_ST_IS_MIPS16 (other)						\
834     ? ((other) & (~STO_MIPS16 & STO_MIPS_FLAGS))			\
835     : ((other) & STO_MIPS_FLAGS)) == STO_MIPS_PLT)
836 #define ELF_ST_SET_MIPS_PLT(other)					\
837   ((ELF_ST_IS_MIPS16 (other)						\
838     ? ((other) & (STO_MIPS16 | ~STO_MIPS_FLAGS))			\
839     : ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PLT)
840 
841 /* This value is used to mark PIC functions in an object that mixes
842    PIC and non-PIC.  Note that this bit overlaps with STO_MIPS16,
843    although MIPS16 symbols are never considered to be MIPS_PIC.  */
844 #define STO_MIPS_PIC		0x20
845 #define ELF_ST_IS_MIPS_PIC(other) (((other) & STO_MIPS_FLAGS) == STO_MIPS_PIC)
846 #define ELF_ST_SET_MIPS_PIC(other)					\
847   ((ELF_ST_IS_MIPS16 (other)						\
848     ? ((other) & ~(STO_MIPS16 | STO_MIPS_FLAGS))			\
849     : ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PIC)
850 
851 /* This value is used for a mips16 .text symbol.  */
852 #define STO_MIPS16		0xf0
853 #define ELF_ST_IS_MIPS16(other) (((other) & STO_MIPS16) == STO_MIPS16)
854 #define ELF_ST_SET_MIPS16(other) ((other) | STO_MIPS16)
855 
856 /* This value is used for a microMIPS .text symbol.  To distinguish from
857    STO_MIPS16, we set top two bits to be 10 to denote STO_MICROMIPS.  The
858    mask is STO_MIPS_ISA.  */
859 #define STO_MICROMIPS		(2 << 6)
860 #define ELF_ST_IS_MICROMIPS(other) (((other) & STO_MIPS_ISA) == STO_MICROMIPS)
861 #define ELF_ST_SET_MICROMIPS(other) (((other) & ~STO_MIPS_ISA) | STO_MICROMIPS)
862 
863 /* Whether code compression (either of the MIPS16 or the microMIPS ASEs)
864    has been indicated for a .text symbol.  */
865 #define ELF_ST_IS_COMPRESSED(other) \
866   (ELF_ST_IS_MIPS16 (other) || ELF_ST_IS_MICROMIPS (other))
867 
868 /* This bit is used on Irix to indicate a symbol whose definition
869    is optional - if, at final link time, it cannot be found, no
870    error message should be produced.  */
871 #define STO_OPTIONAL		(1 << 2)
872 /* A macro to examine the STO_OPTIONAL bit.  */
873 #define ELF_MIPS_IS_OPTIONAL(other)	((other) & STO_OPTIONAL)
874 
875 /* The 64-bit MIPS ELF ABI uses an unusual reloc format.  Each
876    relocation entry specifies up to three actual relocations, all at
877    the same address.  The first relocation which required a symbol
878    uses the symbol in the r_sym field.  The second relocation which
879    requires a symbol uses the symbol in the r_ssym field.  If all
880    three relocations require a symbol, the third one uses a zero
881    value.  */
882 
883 /* An entry in a 64 bit SHT_REL section.  */
884 
885 typedef struct
886 {
887   /* Address of relocation.  */
888   unsigned char r_offset[8];
889   /* Symbol index.  */
890   unsigned char r_sym[4];
891   /* Special symbol.  */
892   unsigned char r_ssym[1];
893   /* Third relocation.  */
894   unsigned char r_type3[1];
895   /* Second relocation.  */
896   unsigned char r_type2[1];
897   /* First relocation.  */
898   unsigned char r_type[1];
899 } Elf64_Mips_External_Rel;
900 
901 typedef struct
902 {
903   /* Address of relocation.  */
904   bfd_vma r_offset;
905   /* Symbol index.  */
906   unsigned long r_sym;
907   /* Special symbol.  */
908   unsigned char r_ssym;
909   /* Third relocation.  */
910   unsigned char r_type3;
911   /* Second relocation.  */
912   unsigned char r_type2;
913   /* First relocation.  */
914   unsigned char r_type;
915 } Elf64_Mips_Internal_Rel;
916 
917 /* An entry in a 64 bit SHT_RELA section.  */
918 
919 typedef struct
920 {
921   /* Address of relocation.  */
922   unsigned char r_offset[8];
923   /* Symbol index.  */
924   unsigned char r_sym[4];
925   /* Special symbol.  */
926   unsigned char r_ssym[1];
927   /* Third relocation.  */
928   unsigned char r_type3[1];
929   /* Second relocation.  */
930   unsigned char r_type2[1];
931   /* First relocation.  */
932   unsigned char r_type[1];
933   /* Addend.  */
934   unsigned char r_addend[8];
935 } Elf64_Mips_External_Rela;
936 
937 typedef struct
938 {
939   /* Address of relocation.  */
940   bfd_vma r_offset;
941   /* Symbol index.  */
942   unsigned long r_sym;
943   /* Special symbol.  */
944   unsigned char r_ssym;
945   /* Third relocation.  */
946   unsigned char r_type3;
947   /* Second relocation.  */
948   unsigned char r_type2;
949   /* First relocation.  */
950   unsigned char r_type;
951   /* Addend.  */
952   bfd_signed_vma r_addend;
953 } Elf64_Mips_Internal_Rela;
954 
955 /* MIPS ELF 64 relocation info access macros.  */
956 #define ELF64_MIPS_R_SSYM(i) (((i) >> 24) & 0xff)
957 #define ELF64_MIPS_R_TYPE3(i) (((i) >> 16) & 0xff)
958 #define ELF64_MIPS_R_TYPE2(i) (((i) >> 8) & 0xff)
959 #define ELF64_MIPS_R_TYPE(i) ((i) & 0xff)
960 
961 /* Values found in the r_ssym field of a relocation entry.  */
962 
963 /* No relocation.  */
964 #define RSS_UNDEF	0
965 
966 /* Value of GP.  */
967 #define RSS_GP		1
968 
969 /* Value of GP in object being relocated.  */
970 #define RSS_GP0		2
971 
972 /* Address of location being relocated.  */
973 #define RSS_LOC		3
974 
975 /* A SHT_MIPS_OPTIONS section contains a series of options, each of
976    which starts with this header.  */
977 
978 typedef struct
979 {
980   /* Type of option.  */
981   unsigned char kind[1];
982   /* Size of option descriptor, including header.  */
983   unsigned char size[1];
984   /* Section index of affected section, or 0 for global option.  */
985   unsigned char section[2];
986   /* Information specific to this kind of option.  */
987   unsigned char info[4];
988 } Elf_External_Options;
989 
990 typedef struct
991 {
992   /* Type of option.  */
993   unsigned char kind;
994   /* Size of option descriptor, including header.  */
995   unsigned char size;
996   /* Section index of affected section, or 0 for global option.  */
997   unsigned short section;
998   /* Information specific to this kind of option.  */
999   unsigned long info;
1000 } Elf_Internal_Options;
1001 
1002 /* MIPS ELF option header swapping routines.  */
1003 extern void bfd_mips_elf_swap_options_in
1004   (bfd *, const Elf_External_Options *, Elf_Internal_Options *);
1005 extern void bfd_mips_elf_swap_options_out
1006   (bfd *, const Elf_Internal_Options *, Elf_External_Options *);
1007 
1008 /* Values which may appear in the kind field of an Elf_Options
1009    structure.  */
1010 
1011 /* Undefined.  */
1012 #define ODK_NULL	0
1013 
1014 /* Register usage and GP value.  */
1015 #define ODK_REGINFO	1
1016 
1017 /* Exception processing information.  */
1018 #define ODK_EXCEPTIONS	2
1019 
1020 /* Section padding information.  */
1021 #define ODK_PAD		3
1022 
1023 /* Hardware workarounds performed.  */
1024 #define ODK_HWPATCH	4
1025 
1026 /* Fill value used by the linker.  */
1027 #define ODK_FILL	5
1028 
1029 /* Reserved space for desktop tools.  */
1030 #define ODK_TAGS	6
1031 
1032 /* Hardware workarounds, AND bits when merging.  */
1033 #define ODK_HWAND	7
1034 
1035 /* Hardware workarounds, OR bits when merging.  */
1036 #define ODK_HWOR	8
1037 
1038 /* GP group to use for text/data sections.  */
1039 #define ODK_GP_GROUP	9
1040 
1041 /* ID information.  */
1042 #define ODK_IDENT	10
1043 
1044 /* In the 32 bit ABI, an ODK_REGINFO option is just a Elf32_RegInfo
1045    structure.  In the 64 bit ABI, it is the following structure.  The
1046    info field of the options header is not used.  */
1047 
1048 typedef struct
1049 {
1050   /* Mask of general purpose registers used.  */
1051   unsigned char ri_gprmask[4];
1052   /* Padding.  */
1053   unsigned char ri_pad[4];
1054   /* Mask of co-processor registers used.  */
1055   unsigned char ri_cprmask[4][4];
1056   /* GP register value for this object file.  */
1057   unsigned char ri_gp_value[8];
1058 } Elf64_External_RegInfo;
1059 
1060 typedef struct
1061 {
1062   /* Mask of general purpose registers used.  */
1063   unsigned long ri_gprmask;
1064   /* Padding.  */
1065   unsigned long ri_pad;
1066   /* Mask of co-processor registers used.  */
1067   unsigned long ri_cprmask[4];
1068   /* GP register value for this object file.  */
1069   bfd_vma ri_gp_value;
1070 } Elf64_Internal_RegInfo;
1071 
1072 /* ABI Flags structure version 0.  */
1073 
1074 typedef struct
1075 {
1076   /* Version of flags structure.  */
1077   unsigned char version[2];
1078   /* The level of the ISA: 1-5, 32, 64.  */
1079   unsigned char isa_level[1];
1080   /* The revision of ISA: 0 for MIPS V and below, 1-n otherwise.  */
1081   unsigned char isa_rev[1];
1082   /* The size of general purpose registers.  */
1083   unsigned char gpr_size[1];
1084   /* The size of co-processor 1 registers.  */
1085   unsigned char cpr1_size[1];
1086   /* The size of co-processor 2 registers.  */
1087   unsigned char cpr2_size[1];
1088   /* The floating-point ABI.  */
1089   unsigned char fp_abi[1];
1090   /* Processor-specific extension.  */
1091   unsigned char isa_ext[4];
1092   /* Mask of ASEs used.  */
1093   unsigned char ases[4];
1094   /* Mask of general flags.  */
1095   unsigned char flags1[4];
1096   unsigned char flags2[4];
1097 } Elf_External_ABIFlags_v0;
1098 
1099 typedef struct
1100 {
1101   /* Version of flags structure.  */
1102   unsigned short version;
1103   /* The level of the ISA: 1-5, 32, 64.  */
1104   unsigned char isa_level;
1105   /* The revision of ISA: 0 for MIPS V and below, 1-n otherwise.  */
1106   unsigned char isa_rev;
1107   /* The size of general purpose registers.  */
1108   unsigned char gpr_size;
1109   /* The size of co-processor 1 registers.  */
1110   unsigned char cpr1_size;
1111   /* The size of co-processor 2 registers.  */
1112   unsigned char cpr2_size;
1113   /* The floating-point ABI.  */
1114   unsigned char fp_abi;
1115   /* Processor-specific extension.  */
1116   unsigned long isa_ext;
1117   /* Mask of ASEs used.  */
1118   unsigned long ases;
1119   /* Mask of general flags.  */
1120   unsigned long flags1;
1121   unsigned long flags2;
1122 } Elf_Internal_ABIFlags_v0;
1123 
1124 typedef struct
1125 {
1126   /* The hash value computed from the name of the corresponding
1127      dynamic symbol.  */
1128   unsigned char ms_hash_value[4];
1129   /* Contains both the dynamic relocation index and the symbol flags
1130      field.  The macros ELF32_MS_REL_INDEX and ELF32_MS_FLAGS are used
1131      to access the individual values.  The dynamic relocation index
1132      identifies the first entry in the .rel.dyn section that
1133      references the dynamic symbol corresponding to this msym entry.
1134      If the index is 0, no dynamic relocations are associated with the
1135      symbol.  The symbol flags field is reserved for future use.  */
1136   unsigned char ms_info[4];
1137 } Elf32_External_Msym;
1138 
1139 typedef struct
1140 {
1141   /* The hash value computed from the name of the corresponding
1142      dynamic symbol.  */
1143   unsigned long ms_hash_value;
1144   /* Contains both the dynamic relocation index and the symbol flags
1145      field.  The macros ELF32_MS_REL_INDEX and ELF32_MS_FLAGS are used
1146      to access the individual values.  The dynamic relocation index
1147      identifies the first entry in the .rel.dyn section that
1148      references the dynamic symbol corresponding to this msym entry.
1149      If the index is 0, no dynamic relocations are associated with the
1150      symbol.  The symbol flags field is reserved for future use.  */
1151   unsigned long ms_info;
1152 } Elf32_Internal_Msym;
1153 
1154 #define ELF32_MS_REL_INDEX(i) ((i) >> 8)
1155 #define ELF32_MS_FLAGS(i)     (i) & 0xff)
1156 #define ELF32_MS_INFO(r, f)   (((r) << 8) + ((f) & 0xff))
1157 
1158 /* MIPS ELF reginfo swapping routines.  */
1159 extern void bfd_mips_elf64_swap_reginfo_in
1160   (bfd *, const Elf64_External_RegInfo *, Elf64_Internal_RegInfo *);
1161 extern void bfd_mips_elf64_swap_reginfo_out
1162   (bfd *, const Elf64_Internal_RegInfo *, Elf64_External_RegInfo *);
1163 
1164 /* MIPS ELF flags swapping routines.  */
1165 extern void bfd_mips_elf_swap_abiflags_v0_in
1166   (bfd *, const Elf_External_ABIFlags_v0 *, Elf_Internal_ABIFlags_v0 *);
1167 extern void bfd_mips_elf_swap_abiflags_v0_out
1168   (bfd *, const Elf_Internal_ABIFlags_v0 *, Elf_External_ABIFlags_v0 *);
1169 
1170 /* Masks for the info work of an ODK_EXCEPTIONS descriptor.  */
1171 #define OEX_FPU_MIN	0x1f	/* FPEs which must be enabled.  */
1172 #define OEX_FPU_MAX	0x1f00	/* FPEs which may be enabled.  */
1173 #define OEX_PAGE0	0x10000	/* Page zero must be mapped.  */
1174 #define OEX_SMM		0x20000	/* Force sequential memory mode.  */
1175 #define OEX_FPDBUG	0x40000	/* Force precise floating-point
1176 				   exceptions (debug mode).  */
1177 #define OEX_DISMISS	0x80000	/* Dismiss invalid address faults.  */
1178 
1179 /* Masks of the FP exceptions for OEX_FPU_MIN and OEX_FPU_MAX.  */
1180 #define OEX_FPU_INVAL	0x10	/* Invalid operation exception.  */
1181 #define OEX_FPU_DIV0	0x08	/* Division by zero exception.  */
1182 #define OEX_FPU_OFLO	0x04	/* Overflow exception.  */
1183 #define OEX_FPU_UFLO	0x02	/* Underflow exception.  */
1184 #define OEX_FPU_INEX	0x01	/* Inexact exception.  */
1185 
1186 /* Masks for the info word of an ODK_PAD descriptor.  */
1187 #define OPAD_PREFIX	0x01
1188 #define OPAD_POSTFIX	0x02
1189 #define OPAD_SYMBOL	0x04
1190 
1191 /* Masks for the info word of an ODK_HWPATCH descriptor.  */
1192 #define OHW_R4KEOP	0x00000001	/* R4000 end-of-page patch.  */
1193 #define OHW_R8KPFETCH	0x00000002	/* May need R8000 prefetch patch.  */
1194 #define OHW_R5KEOP	0x00000004	/* R5000 end-of-page patch.  */
1195 #define OHW_R5KCVTL	0x00000008	/* R5000 cvt.[ds].l bug
1196 					   (clean == 1).  */
1197 #define OHW_R10KLDL	0x00000010	/* Needs R10K misaligned
1198 					   load patch. */
1199 
1200 /* Masks for the info word of an ODK_IDENT/ODK_GP_GROUP descriptor.  */
1201 #define OGP_GROUP	0x0000ffff	/* GP group number.  */
1202 #define OGP_SELF	0xffff0000	/* Self-contained GP groups.  */
1203 
1204 /* Masks for the info word of an ODK_HWAND/ODK_HWOR descriptor.  */
1205 #define OHWA0_R4KEOP_CHECKED	0x00000001
1206 #define OHWA0_R4KEOP_CLEAN	0x00000002
1207 
1208 /* Values for the xxx_size bytes of an ABI flags structure.  */
1209 
1210 #define AFL_REG_NONE	     0x00	/* No registers.  */
1211 #define AFL_REG_32	     0x01	/* 32-bit registers.  */
1212 #define AFL_REG_64	     0x02	/* 64-bit registers.  */
1213 #define AFL_REG_128	     0x03	/* 128-bit registers.  */
1214 
1215 /* Masks for the ases word of an ABI flags structure.  */
1216 
1217 #define AFL_ASE_DSP          0x00000001 /* DSP ASE.  */
1218 #define AFL_ASE_DSPR2        0x00000002 /* DSP R2 ASE.  */
1219 #define AFL_ASE_EVA          0x00000004 /* Enhanced VA Scheme.  */
1220 #define AFL_ASE_MCU          0x00000008 /* MCU (MicroController) ASE.  */
1221 #define AFL_ASE_MDMX         0x00000010 /* MDMX ASE.  */
1222 #define AFL_ASE_MIPS3D       0x00000020 /* MIPS-3D ASE.  */
1223 #define AFL_ASE_MT           0x00000040 /* MT ASE.  */
1224 #define AFL_ASE_SMARTMIPS    0x00000080 /* SmartMIPS ASE.  */
1225 #define AFL_ASE_VIRT         0x00000100 /* VZ ASE.  */
1226 #define AFL_ASE_MSA          0x00000200 /* MSA ASE.  */
1227 #define AFL_ASE_MIPS16       0x00000400 /* MIPS16 ASE.  */
1228 #define AFL_ASE_MICROMIPS    0x00000800 /* MICROMIPS ASE.  */
1229 #define AFL_ASE_XPA          0x00001000 /* XPA ASE.  */
1230 #define AFL_ASE_DSPR6        0x00002000 /* DSP R6 ASE.  */
1231 #define AFL_ASE_MASK         0x00003fff /* All ASEs.  */
1232 
1233 /* Values for the isa_ext word of an ABI flags structure.  */
1234 
1235 #define AFL_EXT_XLR           1  /* RMI Xlr instruction.  */
1236 #define AFL_EXT_OCTEON2       2  /* Cavium Networks Octeon2.  */
1237 #define AFL_EXT_OCTEONP       3  /* Cavium Networks OcteonP.  */
1238 #define AFL_EXT_LOONGSON_3A   4  /* Loongson 3A.  */
1239 #define AFL_EXT_OCTEON        5  /* Cavium Networks Octeon.  */
1240 #define AFL_EXT_5900          6  /* MIPS R5900 instruction.  */
1241 #define AFL_EXT_4650          7  /* MIPS R4650 instruction.  */
1242 #define AFL_EXT_4010          8  /* LSI R4010 instruction.  */
1243 #define AFL_EXT_4100          9  /* NEC VR4100 instruction.  */
1244 #define AFL_EXT_3900         10  /* Toshiba R3900 instruction.  */
1245 #define AFL_EXT_10000        11  /* MIPS R10000 instruction.  */
1246 #define AFL_EXT_SB1          12  /* Broadcom SB-1 instruction.  */
1247 #define AFL_EXT_4111         13  /* NEC VR4111/VR4181 instruction.  */
1248 #define AFL_EXT_4120         14  /* NEC VR4120 instruction.  */
1249 #define AFL_EXT_5400         15  /* NEC VR5400 instruction.  */
1250 #define AFL_EXT_5500         16  /* NEC VR5500 instruction.  */
1251 #define AFL_EXT_LOONGSON_2E  17  /* ST Microelectronics Loongson 2E.  */
1252 #define AFL_EXT_LOONGSON_2F  18  /* ST Microelectronics Loongson 2F.  */
1253 #define AFL_EXT_OCTEON3      19  /* Cavium Networks Octeon3.  */
1254 
1255 /* Masks for the flags1 word of an ABI flags structure.  */
1256 #define AFL_FLAGS1_ODDSPREG   1	 /* Uses odd single-precision registers.  */
1257 
1258 extern unsigned int bfd_mips_isa_ext (bfd *);
1259 
1260 
1261 /* Object attribute tags.  */
1262 enum
1263 {
1264   /* 0-3 are generic.  */
1265 
1266   /* Floating-point ABI used by this object file.  */
1267   Tag_GNU_MIPS_ABI_FP = 4,
1268 
1269   /* MSA ABI used by this object file.  */
1270   Tag_GNU_MIPS_ABI_MSA = 8,
1271 };
1272 
1273 /* Object attribute values.  */
1274 enum
1275 {
1276   /* Values defined for Tag_GNU_MIPS_ABI_FP.  */
1277 
1278   /* Not tagged or not using any ABIs affected by the differences.  */
1279   Val_GNU_MIPS_ABI_FP_ANY = 0,
1280 
1281   /* Using hard-float -mdouble-float.  */
1282   Val_GNU_MIPS_ABI_FP_DOUBLE = 1,
1283 
1284   /* Using hard-float -msingle-float.  */
1285   Val_GNU_MIPS_ABI_FP_SINGLE = 2,
1286 
1287   /* Using soft-float.  */
1288   Val_GNU_MIPS_ABI_FP_SOFT = 3,
1289 
1290   /* Using -mips32r2 -mfp64.  */
1291   Val_GNU_MIPS_ABI_FP_OLD_64 = 4,
1292 
1293   /* Using -mfpxx */
1294   Val_GNU_MIPS_ABI_FP_XX = 5,
1295 
1296   /* Using -mips32r2 -mfp64.  */
1297   Val_GNU_MIPS_ABI_FP_64 = 6,
1298 
1299   /* Using -mips32r2 -mfp64 -mno-odd-spreg.  */
1300   Val_GNU_MIPS_ABI_FP_64A = 7,
1301 
1302   /* Values defined for Tag_GNU_MIPS_ABI_MSA.  */
1303 
1304   /* Not tagged or not using any ABIs affected by the differences.  */
1305   Val_GNU_MIPS_ABI_MSA_ANY = 0,
1306 
1307   /* Using 128-bit MSA.  */
1308   Val_GNU_MIPS_ABI_MSA_128 = 1,
1309 };
1310 
1311 #endif /* _ELF_MIPS_H */
1312