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Searched refs:V1 (Results 1 – 14 of 14) sorted by relevance

/toolchain/binutils/binutils-2.25/ld/testsuite/ld-mips-elf/
Dmips16-pic-4a.nd6 +2: 00040420 +12 +FUNC +GLOBAL +DEFAULT +.* f1@@V1
7 +3: 00000000 +0 +OBJECT +GLOBAL +DEFAULT +ABS V1
8 +4: 00040408 +8 +FUNC +GLOBAL +DEFAULT +.* f3@@V1
9 +5: 00040400 +8 +FUNC +GLOBAL +DEFAULT +.* f2@@V1
Dmips16-pic-4b.s4 # Define a MIPS16 function f1@@V1.
7 .symver _f1,f1@@V1
Dmips16-pic-4.ver1 V1 {
Dmips16-pic-4a.dd20 00040420 <f1@@V1>:
/toolchain/binutils/binutils-2.25/cpu/
Dmep-avc2.cpu1080 (dn16i cnop_avc2_v1 "cnop" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cnop"))
1090 (dn16i cmov_avc2_v1 "cmov" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmov"))
1097 (dn16i cmovi_avc2_v1 "cmovi" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmovi"))
1104 (dn16i cadd3_avc2_v1 "cadd3" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cadd3"))
1111 (dn16i caddi_avc2_v1 "caddi" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "caddi"))
1118 (dn16i csub_avc2_v1 "csub" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csub"))
1125 (dn16i cneg_avc2_v1 "cneg" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cneg"))
1132 (dn16i cextb_avc2_v1 "cextb" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cextb"))
1139 (dn16i cexth_avc2_v1 "cexth" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cexth"))
1146 (dn16i cextub_avc2_v1 "cextub" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cextub"))
[all …]
Dmep-avc.cpu796 (dn16i cnop_avc_v1 "cnop" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cnop"))
806 (dn16i cmov_avc_v1 "cmov" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmov"))
813 (dn16i cmovi_avc_v1 "cmovi" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmovi"))
820 (dn16i cadd3_avc_v1 "cadd3" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cadd3"))
827 (dn16i caddi_avc_v1 "caddi" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "caddi"))
834 (dn16i csub_avc_v1 "csub" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csub"))
841 (dn16i cneg_avc_v1 "cneg" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cneg"))
848 (dn16i cextb_avc_v1 "cextb" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cextb"))
855 (dn16i cexth_avc_v1 "cexth" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cexth"))
862 (dn16i cextub_avc_v1 "cextub" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cextub"))
[all …]
Dmep.opc1363 /* V1 [-----core-----][--------p0s-------][------------p1------------] */
Dip2k.cpu339 ; pp 19-20 of IP2022 spec V1.09
Dmep-core.cpu901 (values NONE C3 V1 V3 P0S P0 P1)
/toolchain/binutils/binutils-2.25/gold/testsuite/
Dversion_script.map1 V1 {
34 } V1;
/toolchain/binutils/binutils-2.25/opcodes/
Dmips-opc.c362 #define V1 (INSN_4100 | INSN_4111 | INSN_4120) macro
1225 {"hibernate", "", 0x42000023, 0xffffffff, 0, 0, V1, 0, 0 },
1975 {"standby", "", 0x42000021, 0xffffffff, 0, 0, V1, 0, 0 },
1996 {"suspend", "", 0x42000022, 0xffffffff, 0, 0, V1, 0, 0 },
DChangeLog-02031186 * mips-opc.c (V1): Include INSN_4111 and INSN_4120.
1189 Change dmadd16 and madd16 from V1 to N411.
DChangeLog-92972327 * mips-opc.c: Added shorthand (V1) for INSN_4100 manifest. Added
/toolchain/binutils/binutils-2.25/gas/config/
Dtc-arm.c17908 REGDEF(V1,4,RN), REGDEF(V2,5,RN), REGDEF(V3, 6,RN), REGDEF(V4, 7,RN),