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Searched refs:WR_C0 (Results 1 – 2 of 2) sorted by relevance

/toolchain/binutils/binutils-2.25/opcodes/
Dmips-opc.c299 #define WR_C0 INSN_COP macro
1050 {"daddwc", "d,s,t", 0x70000038, 0xfc0007ff, WR_1|RD_2|RD_3|WR_C0|RD_C0, 0, XLR, 0, 0 },
1077 {"di", "", 0x42000039, 0xffffffff, WR_C0, 0, EE, 0, 0 },
1078 {"di", "", 0x41606000, 0xffffffff, WR_C0, 0, I33, 0, 0 },
1079 {"di", "t", 0x41606000, 0xffe0ffff, WR_1|WR_C0, 0, I33, 0, 0 },
1129 {"dmtc0", "t,G", 0x40a00000, 0xffe007ff, RD_1|WR_C0|WR_CC|CM, 0, I3, 0, EE },
1130 {"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, RD_1|WR_C0|WR_CC|CM, 0, I64, 0, 0 },
1131 {"dmtgc0", "t,G", 0x40600300, 0xffe007ff, RD_1|WR_C0|WR_CC|CM, 0, 0, IVIRT64, 0 },
1132 {"dmtgc0", "t,G,H", 0x40600300, 0xffe007f8, RD_1|WR_C0|WR_CC|CM, 0, 0, IVIRT64, 0 },
1208 {"ei", "", 0x42000038, 0xffffffff, WR_C0, 0, EE, 0, 0 },
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Dmicromips-opc.c235 #define WR_C0 INSN_COP macro
620 {"dmtc0", "t,G", 0x580002fc, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, I3, 0, 0 },
621 {"dmtc0", "t,G,H", 0x580002fc, 0xfc00c7ff, RD_1|WR_C0|WR_CC, 0, I3, 0, 0 },
622 {"dmtgc0", "t,G", 0x580006fc, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, 0, IVIRT64, 0 },
623 {"dmtgc0", "t,G,H", 0x580006fc, 0xfc00c7ff, RD_1|WR_C0|WR_CC, 0, 0, IVIRT64, 0 },
682 {"ei", "", 0x0000577c, 0xffffffff, WR_C0, 0, I1, 0, 0 },
683 {"ei", "s", 0x0000577c, 0xffe0ffff, WR_1|WR_C0, 0, I1, 0, 0 },
868 {"mtc0", "t,G", 0x000002fc, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, I1, 0, 0 },
869 {"mtc0", "t,G,H", 0x000002fc, 0xfc00c7ff, RD_1|WR_C0|WR_CC, 0, I1, 0, 0 },
873 {"mtgc0", "t,G", 0x000006fc, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, 0, IVIRT, 0 },
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