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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/tic6x/
Dreloc-bad-3.s29 addk .S1 b32767-b0,a9
30 addk .S1 b0-b32768,a9
31 addk .S1 b32768-b0,a9
32 addk .S1 b32767-b65536,a9
33 mvk .S1 b32767-b0,a9
34 mvk .S1 b0-b32768,a9
35 mvk .S1 b32768-b0,a9
36 mvk .S1 b32767-b65536,a9
Dinsns-c674x.s12 abs2 .L1 a9,a10
20 abssp .S1 a9,a8
50 add .D1 a5,a9,a2
84 [b1] adddp .L1X a9:a8,b7:b6,a21:a20
113 addu .L1 a11,a9:a8,a7:a6
226 cmpeq2 .S1 a11,a9,a10
234 cmpeqdp .S1 a9:a8,a7:a6,a5
386 deal .M1 a8,a9
467 gmpy .M1 a25,a16,a9
491 [b2] ldb .D1T2 *++a9,b11
[all …]
/toolchain/binutils/binutils-2.25/ld/testsuite/ld-powerpc/
Dvle-reloc-2.d46 1800128: 70 01 a9 c2 e_cmpl16i r1,450
47 180012c: 70 02 a9 81 e_cmpl16i r2,385
48 1800130: 70 03 a9 81 e_cmpl16i r3,385
49 1800134: 70 04 a9 ce e_cmpl16i r4,462
50 1800138: 70 05 a9 80 e_cmpl16i r5,384
51 180013c: 70 02 a9 81 e_cmpl16i r2,385
Dtlsexe.d36 .* (4b ff ff a9|a9 ff ff 4b) bl .*
69 .* (a9 49 90 30|30 90 49 a9) lha r10,-28624\(r9\)
Dtls32.d40 .*: (a9 49 90 18|18 90 49 a9) lha r10,-28648\(r9\)
Dtlsexe32.d39 .*: (a9 49 90 18|18 90 49 a9) lha r10,-28648\(r9\)
Dtlsso32.d39 .*: (a9 49 00 00|00 00 49 a9) lha r10,0\(r9\)
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/
Dx86-64-tbm.d42 [ ]*[a-f0-9]+: 8f a9 68 01 0c a6 blcfill \(%rsi,%r12,4\),%edx
44 [ ]*[a-f0-9]+: 8f a9 50 01 0c ad 00 00 00 00 blcfill 0x0\(,%r13,4\),%ebp
47 [ ]*[a-f0-9]+: 8f a9 10 01 0c 45 ad de 00 00 blcfill 0xdead\(,%r8,2\),%r13d
54 [ ]*[a-f0-9]+: 67 8f a9 08 01 4c 19 0b blcfill 0xb\(%ecx,%r11d,1\),%r14d
86 [ ]*[a-f0-9]+: 67 8f a9 40 02 34 75 00 00 00 00 blci 0x0\(,%r14d,2\),%edi
116 [ ]*[a-f0-9]+: 8f a9 00 01 2c 1d a7 d0 1a 14 blcic 0x141ad0a7\(,%r11,1\),%r15d
117 [ ]*[a-f0-9]+: 8f a9 10 01 2c 88 blcic \(%rax,%r9,4\),%r13d
121 [ ]*[a-f0-9]+: 67 8f a9 f0 01 2c 2d b3 cb d3 59 blcic 0x59d3cbb3\(,%r13d,1\),%rcx
141 [ ]*[a-f0-9]+: 8f a9 10 02 0c d5 00 00 00 00 blcmsk 0x0\(,%r10,8\),%r13d
147 [ ]*[a-f0-9]+: 8f a9 00 02 0c b5 00 00 00 00 blcmsk 0x0\(,%r14,4\),%r15d
[all …]
Dx86-64-tbm-intel.d44 [ ]*[a-f0-9]+: 8f a9 68 01 0c a6[ ]+blcfill edx,DWORD PTR \[rsi\+r12\*4\]
46 [ ]*[a-f0-9]+: 8f a9 50 01 0c ad 00 00 00 00[ ]+blcfill ebp,DWORD PTR \[r13\*4\+0x0\]
49 [ ]*[a-f0-9]+: 8f a9 10 01 0c 45 ad de 00 00[ ]+blcfill r13d,DWORD PTR \[r8\*2\+0xdead\]
56 [ ]*[a-f0-9]+: 67 8f a9 08 01 4c 19 0b[ ]+blcfill r14d,DWORD PTR \[ecx\+r11d\*1\+0xb\]
88 [ ]*[a-f0-9]+: 67 8f a9 40 02 34 75 00 00 00 00[ ]+blci edi,DWORD PTR \[r14d\*2\+0x0\]
118 [ ]*[a-f0-9]+: 8f a9 00 01 2c 1d a7 d0 1a 14[ ]+blcic r15d,DWORD PTR \[r11\*1\+0x141ad0a7\]
119 [ ]*[a-f0-9]+: 8f a9 10 01 2c 88[ ]+blcic r13d,DWORD PTR \[rax\+r9\*4\]
123 [ ]*[a-f0-9]+: 67 8f a9 f0 01 2c 2d b3 cb d3 59[ ]+blcic rcx,QWORD PTR \[r13d\*1\+0x59d3cbb3\]
143 [ ]*[a-f0-9]+: 8f a9 10 02 0c d5 00 00 00 00[ ]+blcmsk r13d,DWORD PTR \[r10\*8\+0x0\]
149 [ ]*[a-f0-9]+: 8f a9 00 02 0c b5 00 00 00 00[ ]+blcmsk r15d,DWORD PTR \[r14\*4\+0x0\]
[all …]
Dx86-64-fma-scalar.d13 [ ]*[a-f0-9]+: c4 e2 cd a9 d4 vfmadd213sd %xmm4,%xmm6,%xmm2
14 [ ]*[a-f0-9]+: c4 e2 cd a9 11 vfmadd213sd \(%rcx\),%xmm6,%xmm2
37 [ ]*[a-f0-9]+: c4 e2 4d a9 d4 vfmadd213ss %xmm4,%xmm6,%xmm2
38 [ ]*[a-f0-9]+: c4 e2 4d a9 11 vfmadd213ss \(%rcx\),%xmm6,%xmm2
62 [ ]*[a-f0-9]+: c4 e2 cd a9 d4 vfmadd213sd %xmm4,%xmm6,%xmm2
63 [ ]*[a-f0-9]+: c4 e2 cd a9 11 vfmadd213sd \(%rcx\),%xmm6,%xmm2
64 [ ]*[a-f0-9]+: c4 e2 cd a9 11 vfmadd213sd \(%rcx\),%xmm6,%xmm2
98 [ ]*[a-f0-9]+: c4 e2 4d a9 d4 vfmadd213ss %xmm4,%xmm6,%xmm2
99 [ ]*[a-f0-9]+: c4 e2 4d a9 11 vfmadd213ss \(%rcx\),%xmm6,%xmm2
100 [ ]*[a-f0-9]+: c4 e2 4d a9 11 vfmadd213ss \(%rcx\),%xmm6,%xmm2
Dfma-scalar.d13 [ ]*[a-f0-9]+: c4 e2 cd a9 d4 vfmadd213sd %xmm4,%xmm6,%xmm2
14 [ ]*[a-f0-9]+: c4 e2 cd a9 11 vfmadd213sd \(%ecx\),%xmm6,%xmm2
37 [ ]*[a-f0-9]+: c4 e2 4d a9 d4 vfmadd213ss %xmm4,%xmm6,%xmm2
38 [ ]*[a-f0-9]+: c4 e2 4d a9 11 vfmadd213ss \(%ecx\),%xmm6,%xmm2
62 [ ]*[a-f0-9]+: c4 e2 cd a9 d4 vfmadd213sd %xmm4,%xmm6,%xmm2
63 [ ]*[a-f0-9]+: c4 e2 cd a9 11 vfmadd213sd \(%ecx\),%xmm6,%xmm2
64 [ ]*[a-f0-9]+: c4 e2 cd a9 11 vfmadd213sd \(%ecx\),%xmm6,%xmm2
98 [ ]*[a-f0-9]+: c4 e2 4d a9 d4 vfmadd213ss %xmm4,%xmm6,%xmm2
99 [ ]*[a-f0-9]+: c4 e2 4d a9 11 vfmadd213ss \(%ecx\),%xmm6,%xmm2
100 [ ]*[a-f0-9]+: c4 e2 4d a9 11 vfmadd213ss \(%ecx\),%xmm6,%xmm2
Dfma-scalar-intel.d14 [ ]*[a-f0-9]+: c4 e2 cd a9 d4 vfmadd213sd xmm2,xmm6,xmm4
15 [ ]*[a-f0-9]+: c4 e2 cd a9 11 vfmadd213sd xmm2,xmm6,QWORD PTR \[ecx\]
38 [ ]*[a-f0-9]+: c4 e2 4d a9 d4 vfmadd213ss xmm2,xmm6,xmm4
39 [ ]*[a-f0-9]+: c4 e2 4d a9 11 vfmadd213ss xmm2,xmm6,DWORD PTR \[ecx\]
63 [ ]*[a-f0-9]+: c4 e2 cd a9 d4 vfmadd213sd xmm2,xmm6,xmm4
64 [ ]*[a-f0-9]+: c4 e2 cd a9 11 vfmadd213sd xmm2,xmm6,QWORD PTR \[ecx\]
65 [ ]*[a-f0-9]+: c4 e2 cd a9 11 vfmadd213sd xmm2,xmm6,QWORD PTR \[ecx\]
99 [ ]*[a-f0-9]+: c4 e2 4d a9 d4 vfmadd213ss xmm2,xmm6,xmm4
100 [ ]*[a-f0-9]+: c4 e2 4d a9 11 vfmadd213ss xmm2,xmm6,DWORD PTR \[ecx\]
101 [ ]*[a-f0-9]+: c4 e2 4d a9 11 vfmadd213ss xmm2,xmm6,DWORD PTR \[ecx\]
Dx86-64-fma-scalar-intel.d14 [ ]*[a-f0-9]+: c4 e2 cd a9 d4 vfmadd213sd xmm2,xmm6,xmm4
15 [ ]*[a-f0-9]+: c4 e2 cd a9 11 vfmadd213sd xmm2,xmm6,QWORD PTR \[rcx\]
38 [ ]*[a-f0-9]+: c4 e2 4d a9 d4 vfmadd213ss xmm2,xmm6,xmm4
39 [ ]*[a-f0-9]+: c4 e2 4d a9 11 vfmadd213ss xmm2,xmm6,DWORD PTR \[rcx\]
63 [ ]*[a-f0-9]+: c4 e2 cd a9 d4 vfmadd213sd xmm2,xmm6,xmm4
64 [ ]*[a-f0-9]+: c4 e2 cd a9 11 vfmadd213sd xmm2,xmm6,QWORD PTR \[rcx\]
65 [ ]*[a-f0-9]+: c4 e2 cd a9 11 vfmadd213sd xmm2,xmm6,QWORD PTR \[rcx\]
99 [ ]*[a-f0-9]+: c4 e2 4d a9 d4 vfmadd213ss xmm2,xmm6,xmm4
100 [ ]*[a-f0-9]+: c4 e2 4d a9 11 vfmadd213ss xmm2,xmm6,DWORD PTR \[rcx\]
101 [ ]*[a-f0-9]+: c4 e2 4d a9 11 vfmadd213ss xmm2,xmm6,DWORD PTR \[rcx\]
Dmpx.d65 [ ]*[a-f0-9]+: f2 e8 63 01 00 00 bnd call 2a9 <foo>
67 [ ]*[a-f0-9]+: f2 0f 84 59 01 00 00 bnd je 2a9 <foo>
68 [ ]*[a-f0-9]+: f2 e9 53 01 00 00 bnd jmp 2a9 <foo>
124 [ ]*[a-f0-9]+: f2 e8 0e 00 00 00 bnd call 2a9 <foo>
126 [ ]*[a-f0-9]+: f2 74 08 bnd je 2a9 <foo>
127 [ ]*[a-f0-9]+: f2 eb 05 bnd jmp 2a9 <foo>
/toolchain/binutils/binutils-2.25/gold/testsuite/
Dcommon_test_1_v2.c51 int a9 __attribute__ ((aligned (1 << 5))); variable
70 assert (&a4 != &a9); in main()
71 assert (&a9 != &a8); in main()
Dcommon_test_1.c51 int a9 __attribute__ ((aligned (1 << 5))); variable
68 assert (&a4 < &a9); in main()
69 assert (&a9 < &a8); in main()
Dcommon_test_1_v1.c54 int a9 __attribute__ ((aligned (1 << 5))); variable
72 assert (&a4 > &a9); in main()
73 assert (&a9 > &a8); in main()
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/sh/
Dsh4a.d16 0x0000000c 40 a9 movua\.l @r0,r0
17 0x0000000e 4d a9 movua\.l @r13,r0
18 0x00000010 47 a9 movua\.l @r7,r0
Dsh4a-dsp.d17 0x0000000c 40 a9 movua\.l @r0,r0
18 0x0000000e 4d a9 movua\.l @r13,r0
19 0x00000010 47 a9 movua\.l @r7,r0
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/sparc/
Dedge.d19 24: a9 b0 80 41 edge8lcc %g2, %g1, %l4
20 28: a9 b0 80 41 edge8lcc %g2, %g1, %l4
21 2c: a9 b0 80 61 edge8ln %g2, %g1, %l4
/toolchain/binutils/binutils-2.25/ld/testsuite/ld-xtensa/
Dtlsbin.s95 movi a9, sh1@tpoff
96 add a9, a9, a8
Dtlspic1.s117 movi a9, sH2@tpoff
118 add a9, a9, a8
Dtlsbin.dd62 [0-9a-f]+: [0-9a-f]+[ ]+l32r a9, 400234 <.*>
63 [0-9a-f]+: [0-9a-f]+[ ]+add.* a9, a9, a8
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/d10v/
Dinst.d10 0: a9 04 c2 29 sac r0, a0 <- sachi r1, a0
11 4: a9 06 c2 2d rac r0, a0, -0x2 <- rachi r1, a0, -0x2
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/crx/
Dload_stor_insn.d21 22: f9 8f a9 fb loadb 0xfba9876e\(r9\), r15
49 76: a9 99
84 d8: f9 cf a9 fb storb r15, 0xfba9876e\(r9\)
115 136: a9 99

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