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Searched refs:arm_opcodes (Results 1 – 12 of 12) sorted by relevance

/toolchain/binutils/binutils-2.25/opcodes/
DChangeLog-2010196 * arm-dis.c (arm_opcodes): Add Virtualiztion Extensions support.
204 * arm-dis.c (arm_opcodes): Support disassembly of UDIV and SDIV in
209 * arm-dis.c (arm_opcodes): SMC implies Security Extensions.
214 * arm-dis.c (arm_opcodes): Add support for pldw.
686 * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
DChangeLog-2006289 * armd-dis.c (arm_opcodes): Fix rbit opcode.
552 (arm_opcodes): Expand meaning of %<bitfield>['`?].
607 * arm-dis.c (arm_opcodes): Rename swi to svc.
702 * arm-dis.c (arm_opcodes): Add V7 instructions.
DChangeLog-2005255 * arm-dis.c (arm_opcodes): Correct "sel" entry.
381 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
400 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
585 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
967 * arm-dis.c (arm_opcodes): Document %E and %V.
DChangeLog-2012335 * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
341 * arm-dis.c (arm_opcodes): Add HLT.
350 * arm-dis.c (arm_opcodes): Add SEVL.
755 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
DChangeLog-200429 (arm_opcodes, thumb_opcodes): Delete. Move to ...
30 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
701 * arm-opc.h (arm_opcodes): Move generic mcrr after known
DChangeLog-2009157 * arm-dis.c (arm_opcodes): Specify %R in cases where using r15
311 * arm-dis.c (arm_opcodes): Add patterns to match undefined LDRB
1033 * arm-dis.c (arm_opcodes): Catch non-zero bits 8-11 in register
1039 * arm-dis.c (arm_opcodes): Catch illegal Addressing Mode 1
1073 * arm-dis.c (arm_opcodes): Be more strict about decoding scaled
1141 (arm_opcodes): Use it.
DChangeLog-020313 * arm-opc.h (arm_opcodes): Put V6 instructions before XScale
33 * arm-opc.h (arm_opcodes): Add V6 instructions.
1085 * arm-opc.h (arm_opcodes): Declare as const.
2064 * arm-opc.h (arm_opcodes): Use generic rule %5?hb instead of %h.
2069 * arm-opc.h (arm_opcodes): Add bxj instruction.
2084 * arm-opc.h (arm_opcodes): Add patterns for VFP instructions.
DChangeLog-2007104 * arm-dis.c (arm_opcodes): Remove superflous escapes of percent
1460 * arm-dis.c (arm_opcodes): Disassemble to unified syntax.
1624 * arm-dis.c (arm_opcodes): Print SRS base register.
1845 * arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
Darm-dis.c876 static const struct opcode32 arm_opcodes[] = variable
3152 for (insn = arm_opcodes; insn->assembler; insn++) in print_insn_arm()
DChangeLog-2013242 * arm-dis.c (arm_opcodes): Add udf.
1133 * arm-dis.c (arm_opcodes): Add entries for CRC instructions.
DChangeLog-0001335 * arm-opc.h (arm_opcodes): Add cirrus insns.
1373 (arm_opcodes): Add XScale, v5, and v5te instructions.
DChangeLog-92971753 * arm-opc.h: (arm_opcodes): Added halfword and sign-extension
2655 * arm-opc.h (arm_opcodes): Add 64-bit multiply patterns. Delete
2658 * arm-opc.h (arm_opcodes): Correct typos in stm, ldm, std, and ldc.