| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/ |
| D | opc-f.s | 5 fma f4 = f5, f6, f7
6 fma.s0 f4 = f5, f6, f7
7 fma.s1 f4 = f5, f6, f7
8 fma.s2 f4 = f5, f6, f7
9 fma.s3 f4 = f5, f6, f7
11 fma.s f4 = f5, f6, f7
12 fma.s.s0 f4 = f5, f6, f7
13 fma.s.s1 f4 = f5, f6, f7
14 fma.s.s2 f4 = f5, f6, f7
15 fma.s.s3 f4 = f5, f6, f7
[all …]
|
| D | opc-m.s | 419 ldfs f4 = [r5]
420 ldfs f4 = [r5], r6
421 ldfs f4 = [r5], -115
422 ldfs.nt1 f4 = [r5]
423 ldfs.nt1 f4 = [r5], r6
424 ldfs.nt1 f4 = [r5], -102
425 ldfs.nta f4 = [r5]
426 ldfs.nta f4 = [r5], r6
427 ldfs.nta f4 = [r5], -89
429 ldfs.s f4 = [r5]
[all …]
|
| D | opc-f.d | 11 6: 40 38 14 0c 40 00 fma\.s0 f4=f5,f6,f7
14 16: 40 38 14 0c 40 00 fma\.s0 f4=f5,f6,f7
17 26: 40 38 14 0c 41 00 fma\.s1 f4=f5,f6,f7
20 36: 40 38 14 0c 42 00 fma\.s2 f4=f5,f6,f7
23 46: 40 38 14 0c 43 00 fma\.s3 f4=f5,f6,f7
26 56: 40 38 14 0c 44 00 fma\.s\.s0 f4=f5,f6,f7
29 66: 40 38 14 0c 44 00 fma\.s\.s0 f4=f5,f6,f7
32 76: 40 38 14 0c 45 00 fma\.s\.s1 f4=f5,f6,f7
35 86: 40 38 14 0c 46 00 fma\.s\.s2 f4=f5,f6,f7
38 96: 40 38 14 0c 47 00 fma\.s\.s3 f4=f5,f6,f7
[all …]
|
| D | opc-m.d | 419 886: 40 00 14 f4 20 00 ld8\.sa\.nt1 r4=\[r5\]
563 b86: 40 00 14 20 30 00 ldfs f4=\[r5\]
565 b90: 18 20 18 0a 10 1a \[MMB\] ldfs f4=\[r5\],r6
566 b96: 40 68 14 22 3c 00 ldfs f4=\[r5\],-115
568 ba0: 18 20 00 0a 12 18 \[MMB\] ldfs\.nt1 f4=\[r5\]
569 ba6: 40 30 14 24 34 00 ldfs\.nt1 f4=\[r5\],r6
571 bb0: 18 20 68 0a 13 1e \[MMB\] ldfs\.nt1 f4=\[r5\],-102
572 bb6: 40 00 14 2c 30 00 ldfs\.nta f4=\[r5\]
574 bc0: 18 20 18 0a 16 1a \[MMB\] ldfs\.nta f4=\[r5\],r6
575 bc6: 40 38 15 2e 3c 00 ldfs\.nta f4=\[r5\],-89
[all …]
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
| D | bundle-lock.d | 15 *0:\s+(f4\s+hlt|f8\s+clc)\s*
17 *20:\s+(f4\s+hlt|f8\s+clc)\s*
19 *40:\s+(f4\s+hlt|f8\s+clc)\s*
21 *60:\s+(f4\s+hlt|f8\s+clc)\s*
23 *80:\s+(f4\s+hlt|f8\s+clc)\s*
25 *a0:\s+(f4\s+hlt|f8\s+clc)\s*
27 *c0:\s+(f4\s+hlt|f8\s+clc)\s*
29 *e0:\s+(f4\s+hlt|f8\s+clc)\s*
31 *100:\s+(f4\s+hlt|f8\s+clc)\s*
33 *120:\s+(f4\s+hlt|f8\s+clc)\s*
[all …]
|
| D | sse2avx.d | 12 [ ]*[a-f0-9]+: c5 f8 5b f4 vcvtdq2ps %xmm4,%xmm6
14 [ ]*[a-f0-9]+: c5 fb e6 f4 vcvtpd2dq %xmm4,%xmm6
16 [ ]*[a-f0-9]+: c5 f9 5a f4 vcvtpd2ps %xmm4,%xmm6
18 [ ]*[a-f0-9]+: c5 f9 5b f4 vcvtps2dq %xmm4,%xmm6
20 [ ]*[a-f0-9]+: c5 f9 e6 f4 vcvttpd2dq %xmm4,%xmm6
22 [ ]*[a-f0-9]+: c5 fa 5b f4 vcvttps2dq %xmm4,%xmm6
24 [ ]*[a-f0-9]+: c5 f9 28 f4 vmovapd %xmm4,%xmm6
26 [ ]*[a-f0-9]+: c5 f8 28 f4 vmovaps %xmm4,%xmm6
28 [ ]*[a-f0-9]+: c5 f9 6f f4 vmovdqa %xmm4,%xmm6
30 [ ]*[a-f0-9]+: c5 fa 6f f4 vmovdqu %xmm4,%xmm6
[all …]
|
| D | x86-64-sse2avx.d | 12 [ ]*[a-f0-9]+: c5 f8 5b f4 vcvtdq2ps %xmm4,%xmm6
14 [ ]*[a-f0-9]+: c5 fb e6 f4 vcvtpd2dq %xmm4,%xmm6
16 [ ]*[a-f0-9]+: c5 f9 5a f4 vcvtpd2ps %xmm4,%xmm6
18 [ ]*[a-f0-9]+: c5 f9 5b f4 vcvtps2dq %xmm4,%xmm6
20 [ ]*[a-f0-9]+: c5 f9 e6 f4 vcvttpd2dq %xmm4,%xmm6
22 [ ]*[a-f0-9]+: c5 fa 5b f4 vcvttps2dq %xmm4,%xmm6
24 [ ]*[a-f0-9]+: c5 f9 28 f4 vmovapd %xmm4,%xmm6
26 [ ]*[a-f0-9]+: c5 f8 28 f4 vmovaps %xmm4,%xmm6
28 [ ]*[a-f0-9]+: c5 f9 6f f4 vmovdqa %xmm4,%xmm6
30 [ ]*[a-f0-9]+: c5 fa 6f f4 vmovdqu %xmm4,%xmm6
[all …]
|
| D | x86-64-avx512dq-rcigru-intel.d | 12 [ ]*[a-f0-9]+:[ ]*62 03 95 50 50 f4 ab[ ]*vrangepd zmm30,zmm29,zmm28,\{sae\},0xab
13 [ ]*[a-f0-9]+:[ ]*62 03 95 50 50 f4 7b[ ]*vrangepd zmm30,zmm29,zmm28,\{sae\},0x7b
14 [ ]*[a-f0-9]+:[ ]*62 03 15 50 50 f4 ab[ ]*vrangeps zmm30,zmm29,zmm28,\{sae\},0xab
15 [ ]*[a-f0-9]+:[ ]*62 03 15 50 50 f4 7b[ ]*vrangeps zmm30,zmm29,zmm28,\{sae\},0x7b
16 [ ]*[a-f0-9]+:[ ]*62 03 95 50 51 f4 ab[ ]*vrangesd xmm30,xmm29,xmm28,\{sae\},0xab
17 [ ]*[a-f0-9]+:[ ]*62 03 95 50 51 f4 7b[ ]*vrangesd xmm30,xmm29,xmm28,\{sae\},0x7b
18 [ ]*[a-f0-9]+:[ ]*62 03 15 50 51 f4 ab[ ]*vrangess xmm30,xmm29,xmm28,\{sae\},0xab
19 [ ]*[a-f0-9]+:[ ]*62 03 15 50 51 f4 7b[ ]*vrangess xmm30,xmm29,xmm28,\{sae\},0x7b
24 [ ]*[a-f0-9]+:[ ]*62 03 95 50 57 f4 ab[ ]*vreducesd xmm30,xmm29,xmm28,\{sae\},0xab
25 [ ]*[a-f0-9]+:[ ]*62 03 95 50 57 f4 7b[ ]*vreducesd xmm30,xmm29,xmm28,\{sae\},0x7b
[all …]
|
| D | x86-64-avx512dq-rcigrd-intel.d | 12 [ ]*[a-f0-9]+:[ ]*62 03 95 30 50 f4 ab[ ]*vrangepd zmm30,zmm29,zmm28,\{sae\},0xab
13 [ ]*[a-f0-9]+:[ ]*62 03 95 30 50 f4 7b[ ]*vrangepd zmm30,zmm29,zmm28,\{sae\},0x7b
14 [ ]*[a-f0-9]+:[ ]*62 03 15 30 50 f4 ab[ ]*vrangeps zmm30,zmm29,zmm28,\{sae\},0xab
15 [ ]*[a-f0-9]+:[ ]*62 03 15 30 50 f4 7b[ ]*vrangeps zmm30,zmm29,zmm28,\{sae\},0x7b
16 [ ]*[a-f0-9]+:[ ]*62 03 95 30 51 f4 ab[ ]*vrangesd xmm30,xmm29,xmm28,\{sae\},0xab
17 [ ]*[a-f0-9]+:[ ]*62 03 95 30 51 f4 7b[ ]*vrangesd xmm30,xmm29,xmm28,\{sae\},0x7b
18 [ ]*[a-f0-9]+:[ ]*62 03 15 30 51 f4 ab[ ]*vrangess xmm30,xmm29,xmm28,\{sae\},0xab
19 [ ]*[a-f0-9]+:[ ]*62 03 15 30 51 f4 7b[ ]*vrangess xmm30,xmm29,xmm28,\{sae\},0x7b
24 [ ]*[a-f0-9]+:[ ]*62 03 95 30 57 f4 ab[ ]*vreducesd xmm30,xmm29,xmm28,\{sae\},0xab
25 [ ]*[a-f0-9]+:[ ]*62 03 95 30 57 f4 7b[ ]*vreducesd xmm30,xmm29,xmm28,\{sae\},0x7b
[all …]
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| D | vr5400.d | 38 0+0078 <stuff\+0x78> add\.ob \$f0,\$f2,\$f4
39 0+007c <stuff\+0x7c> add\.ob \$f2,\$f4,\$f6\[2\]
40 0+0080 <stuff\+0x80> add\.ob \$f6,\$f4,0xf
41 0+0084 <stuff\+0x84> add\.ob \$f4,\$f6,0x1f
42 0+0088 <stuff\+0x88> and\.ob \$f0,\$f2,\$f4
43 0+008c <stuff\+0x8c> and\.ob \$f2,\$f4,\$f6\[2\]
44 0+0090 <stuff\+0x90> and\.ob \$f6,\$f4,0xf
45 0+0094 <stuff\+0x94> and\.ob \$f4,\$f6,0x1f
47 0+009c <stuff\+0x9c> c\.eq\.ob \$f4,\$f6\[2\]
49 0+00a4 <stuff\+0xa4> c\.eq\.ob \$f4,0x1f
[all …]
|
| D | set-arch.s | 45 c.f.d $f4,$f6
46 c.f.d $fcc1,$f4,$f6
49 madd.d $f0,$f2,$f4,$f6
50 madd.s $f0,$f2,$f4,$f6
52 movf.d $f4,$f6,$fcc0
53 movf.s $f4,$f6,$fcc0
55 movn.d $f4,$f6,$6
56 movn.s $f4,$f6,$6
58 movt.d $f4,$f6,$fcc0
59 movt.s $f4,$f6,$fcc0
[all …]
|
| D | l_d-reloc.s | 3 l.d $f4,($5)
4 l.d $f4,0x7ffb($5)
5 l.d $f4,0x7ffc($5)
6 l.d $f4,0x7fff($5)
7 l.d $f4,0x8000($5)
8 l.d $f4,0x37ffb($5)
9 l.d $f4,0x37ffc($5)
10 l.d $f4,0x37fff($5)
11 l.d $f4,0x38000($5)
13 l.d $f4,%lo(foo)
[all …]
|
| D | mips4-fp.s | 7 c.f.d $f4,$f6
8 c.f.d $fcc1,$f4,$f6
11 madd.d $f0,$f2,$f4,$f6
15 movf.d $f4,$f6,$fcc0
16 movf.s $f4,$f6,$fcc0
17 movn.d $f4,$f6,$6
18 movn.s $f4,$f6,$6
20 movt.d $f4,$f6,$fcc0
21 movt.s $f4,$f6,$fcc0
22 movz.d $f4,$f6,$6
[all …]
|
| D | mips4-fp.d | 15 [0-9a-f]+ <[^>]*> c.f.d \$f4,\$f6
16 [0-9a-f]+ <[^>]*> c.f.d \$fcc1,\$f4,\$f6
19 [0-9a-f]+ <[^>]*> madd.d \$f0,\$f2,\$f4,\$f6
22 [0-9a-f]+ <[^>]*> movf.d \$f4,\$f6,\$fcc0
23 [0-9a-f]+ <[^>]*> movf.s \$f4,\$f6,\$fcc0
24 [0-9a-f]+ <[^>]*> movn.d \$f4,\$f6,a2
25 [0-9a-f]+ <[^>]*> movn.s \$f4,\$f6,a2
27 [0-9a-f]+ <[^>]*> movt.d \$f4,\$f6,\$fcc0
28 [0-9a-f]+ <[^>]*> movt.s \$f4,\$f6,\$fcc0
29 [0-9a-f]+ <[^>]*> movz.d \$f4,\$f6,a2
[all …]
|
| D | s_d.d | 11 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(zero\)
12 [0-9a-f]+ <[^>]*> sdc1 \$f4,1\(zero\)
14 [0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(at\)
15 [0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(zero\)
17 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
19 [0-9a-f]+ <[^>]*> sdc1 \$f4,-23131\(at\)
20 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(a1\)
21 [0-9a-f]+ <[^>]*> sdc1 \$f4,1\(a1\)
24 [0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(at\)
25 [0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(a1\)
[all …]
|
| D | s_d-n32.d | 11 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(zero\)
12 [0-9a-f]+ <[^>]*> sdc1 \$f4,1\(zero\)
14 [0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(at\)
15 [0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(zero\)
17 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(at\)
19 [0-9a-f]+ <[^>]*> sdc1 \$f4,-23131\(at\)
20 [0-9a-f]+ <[^>]*> sdc1 \$f4,0\(a1\)
21 [0-9a-f]+ <[^>]*> sdc1 \$f4,1\(a1\)
24 [0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(at\)
25 [0-9a-f]+ <[^>]*> sdc1 \$f4,-32768\(a1\)
[all …]
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| D | l_d.d | 11 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(zero\)
12 [0-9a-f]+ <[^>]*> ldc1 \$f4,1\(zero\)
14 [0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(at\)
15 [0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(zero\)
17 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
19 [0-9a-f]+ <[^>]*> ldc1 \$f4,-23131\(at\)
20 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(a1\)
21 [0-9a-f]+ <[^>]*> ldc1 \$f4,1\(a1\)
24 [0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(at\)
25 [0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(a1\)
[all …]
|
| D | l_d-n32.d | 11 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(zero\)
12 [0-9a-f]+ <[^>]*> ldc1 \$f4,1\(zero\)
14 [0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(at\)
15 [0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(zero\)
17 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(at\)
19 [0-9a-f]+ <[^>]*> ldc1 \$f4,-23131\(at\)
20 [0-9a-f]+ <[^>]*> ldc1 \$f4,0\(a1\)
21 [0-9a-f]+ <[^>]*> ldc1 \$f4,1\(a1\)
24 [0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(at\)
25 [0-9a-f]+ <[^>]*> ldc1 \$f4,-32768\(a1\)
[all …]
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| D | micromips@mips4-fp.d | 20 [0-9a-f]+ <[^>]*> 54c4 043c c\.f\.d \$f4,\$f6
21 [0-9a-f]+ <[^>]*> 54c4 243c c\.f\.d \$fcc1,\$f4,\$f6
24 [0-9a-f]+ <[^>]*> 54c4 0089 madd\.d \$f0,\$f2,\$f4,\$f6
27 [0-9a-f]+ <[^>]*> 5486 0220 movf\.d \$f4,\$f6,\$fcc0
28 [0-9a-f]+ <[^>]*> 5486 0020 movf\.s \$f4,\$f6,\$fcc0
29 [0-9a-f]+ <[^>]*> 54c6 2138 movn\.d \$f4,\$f6,a2
30 [0-9a-f]+ <[^>]*> 54c6 2038 movn\.s \$f4,\$f6,a2
32 [0-9a-f]+ <[^>]*> 5486 0260 movt\.d \$f4,\$f6,\$fcc0
33 [0-9a-f]+ <[^>]*> 5486 0060 movt\.s \$f4,\$f6,\$fcc0
34 [0-9a-f]+ <[^>]*> 54c6 2178 movz\.d \$f4,\$f6,a2
[all …]
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| D | vr5400.s | 51 \op $f4,$f6[2]
55 \op $f4,-3
58 \op $f4,31
64 \op $f0,$f2,$f4
65 \op $f2,$f4,$f6[2]
66 \op $f6,$f4,15
69 \op $f4,$f6,-3
72 \op $f4,$f6,31
96 alni.ob $f0,$f2,$f4,5
97 shfl.mixh.ob $f0,$f2,$f4
[all …]
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| D | vr5400-ill.s | 1 sll.ob $f2,$f4,4
2 sll.ob $f2,$f4,$f6[1]
3 sll.ob $f2,$f4,$f6
5 srl.ob $f2,$f4,4
6 srl.ob $f2,$f4,$f6[1]
7 srl.ob $f2,$f4,$f6
13 add.ob $f2,$f4,$f6
14 add.ob $v2,$f4,$f6
16 add.ob $f2,$f4,$v6
19 add.ob $f2,$f4,$f6[1]
[all …]
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| D | float.s | 6 mvfeqd f4, #1.0
7 mvfs f4, f7
9 mvfdm f3, f4
14 adfsm f3, f4, f5
18 sufneez f3, f4, f5
30 dvfmism f3, f4, f5
34 rdfccdp f4, f4, f3
38 powcsez f4, f7, #1
45 rmfvss f3, f4, f4
46 rmfep f4, f7, f0
[all …]
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| D | float.d | 10 0+008 <[^>]+> 0e00c189 ? mvfeqd f4, #1\.0
11 0+00c <[^>]+> ee00c107 ? mvfs f4, f7
13 0+014 <[^>]+> ee00b1c4 ? mvfdm f3, f4
17 0+024 <[^>]+> ee043145 ? adfsm f3, f4, f5
20 0+030 <[^>]+> 1e2c3165 ? sufneez f3, f4, f5
29 0+054 <[^>]+> 4e443145 ? dvfmism f3, f4, f5
32 0+060 <[^>]+> 3e5441a3 ? rdfccdp f4, f4, f3
35 0+06c <[^>]+> 2e6f4169 ? powcsez f4, f7, #1\.0
40 0+080 <[^>]+> 6e843104 ? rmfvss f3, f4, f4
41 0+084 <[^>]+> ee8f4120 ? rmfep f4, f7, f0
[all …]
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ilp32/ |
| D | x86-64-sse2avx.d | 13 [ ]*[a-f0-9]+: c5 f8 5b f4 vcvtdq2ps %xmm4,%xmm6
15 [ ]*[a-f0-9]+: c5 fb e6 f4 vcvtpd2dq %xmm4,%xmm6
17 [ ]*[a-f0-9]+: c5 f9 5a f4 vcvtpd2ps %xmm4,%xmm6
19 [ ]*[a-f0-9]+: c5 f9 5b f4 vcvtps2dq %xmm4,%xmm6
21 [ ]*[a-f0-9]+: c5 f9 e6 f4 vcvttpd2dq %xmm4,%xmm6
23 [ ]*[a-f0-9]+: c5 fa 5b f4 vcvttps2dq %xmm4,%xmm6
25 [ ]*[a-f0-9]+: c5 f9 28 f4 vmovapd %xmm4,%xmm6
27 [ ]*[a-f0-9]+: c5 f8 28 f4 vmovaps %xmm4,%xmm6
29 [ ]*[a-f0-9]+: c5 f9 6f f4 vmovdqa %xmm4,%xmm6
31 [ ]*[a-f0-9]+: c5 fa 6f f4 vmovdqu %xmm4,%xmm6
[all …]
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ppc/ |
| D | ppc750ps.d | 15 14: (f4 62 70 08|08 70 62 f4) psq_stu f3,8\(r2\),0,7
22 30: (11 82 20 40|40 20 82 11) ps_cmpo0 cr3,f2,f4
23 34: (11 82 20 c0|c0 20 82 11) ps_cmpo1 cr3,f2,f4
24 38: (11 82 20 00|00 20 82 11) ps_cmpu0 cr3,f2,f4
25 3c: (11 82 20 80|80 20 82 11) ps_cmpu1 cr3,f2,f4
26 40: (10 44 30 24|24 30 44 10) ps_div f2,f4,f6
27 44: (10 44 30 25|25 30 44 10) ps_div. f2,f4,f6
30 50: (10 22 20 dc|dc 20 22 10) ps_madds0 f1,f2,f3,f4
31 54: (10 22 20 dd|dd 20 22 10) ps_madds0. f1,f2,f3,f4
32 58: (10 22 20 de|de 20 22 10) ps_madds1 f1,f2,f3,f4
[all …]
|