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Searched refs:gen_sub_field (Results 1 – 3 of 3) sorted by relevance

/toolchain/binutils/binutils-2.25/opcodes/
Daarch64-asm.c252 gen_sub_field (FLD_asisdlso_opcode, 1, 2, &field); in aarch64_ins_ldst_elemlist()
391 gen_sub_field (FLD_cmode, 1, 2, &field); /* per word */ in aarch64_ins_advsimd_imm_modified()
393 gen_sub_field (FLD_cmode, 1, 1, &field); /* per halfword */ in aarch64_ins_advsimd_imm_modified()
399 gen_sub_field (FLD_cmode, 0, 1, &field); /* per word */ in aarch64_ins_advsimd_imm_modified()
741 gen_sub_field (FLD_size, 0, 1, &field); in encode_asimd_fcvt()
754 gen_sub_field (FLD_size, 0, 1, &field); in encode_asisd_fcvtxn()
917 gen_sub_field (FLD_imm5, 0, num + 1, &field); in do_special_encoding()
944 gen_sub_field (FLD_opc, 0, 1, &field); in do_special_encoding()
Daarch64-dis.c425 gen_sub_field (FLD_asisdlso_opcode, 1, 2, &field); in aarch64_ext_ldst_elemlist()
655 case 4: gen_sub_field (FLD_cmode, 1, 2, &field); break; /* per word */ in aarch64_ext_advsimd_imm_modified()
656 case 2: gen_sub_field (FLD_cmode, 1, 1, &field); break; /* per half */ in aarch64_ext_advsimd_imm_modified()
657 case 1: gen_sub_field (FLD_cmode, 1, 0, &field); break; /* per byte */ in aarch64_ext_advsimd_imm_modified()
666 gen_sub_field (FLD_cmode, 0, 1, &field); /* per word */ in aarch64_ext_advsimd_imm_modified()
1265 gen_sub_field (FLD_size, 0, 1, &field); in decode_asimd_fcvt()
1296 gen_sub_field (FLD_size, 0, 1, &field); in decode_asisd_fcvtxn()
1470 gen_sub_field (FLD_opc, 0, 1, &field); in do_special_decoding()
Daarch64-opc.h221 gen_sub_field (enum aarch64_field_kind kind, int lsb_rel, int width, aarch64_field *ret) in gen_sub_field() function