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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/tic6x/
Dpredicate-bad-2.l3 [^:]*:5: Error: instruction 'nop' cannot be predicated
4 [^:]*:6: Error: instruction 'nop' cannot be predicated
5 [^:]*:7: Error: instruction 'nop' cannot be predicated
6 [^:]*:8: Error: instruction 'nop' cannot be predicated
7 [^:]*:9: Error: instruction 'nop' cannot be predicated
8 [^:]*:10: Error: instruction 'nop' cannot be predicated
10 [^:]*:11: Error: instruction 'nop' cannot be predicated
11 [^:]*:12: Error: instruction 'nop' cannot be predicated
12 [^:]*:13: Error: instruction 'nop' cannot be predicated
13 [^:]*:14: Error: instruction 'nop' cannot be predicated
[all …]
Dpredicate-bad-3.l2 [^:]*:5: Error: instruction 'nop' cannot be predicated
3 [^:]*:6: Error: instruction 'nop' cannot be predicated
4 [^:]*:7: Error: instruction 'addab' cannot be predicated
5 [^:]*:8: Error: instruction 'addah' cannot be predicated
6 [^:]*:9: Error: instruction 'addaw' cannot be predicated
7 [^:]*:10: Error: instruction 'callp' cannot be predicated
8 [^:]*:11: Error: instruction 'addsub' cannot be predicated
9 [^:]*:12: Error: instruction 'addsub2' cannot be predicated
10 [^:]*:13: Error: instruction 'cmpy' cannot be predicated
11 [^:]*:14: Error: instruction 'cmpyr' cannot be predicated
[all …]
Dinsns-bad-1.l15 [^:]*:18: Error: 'abs' instruction not supported on this functional unit
39 [^:]*:38: Error: 'abs2' instruction not supported on this functional unit
43 [^:]*:41: Error: 'absdp' instruction not supported on this functional unit
47 [^:]*:44: Error: 'absdp' instruction not supported on this functional unit
48 [^:]*:45: Error: 'abssp' instruction not supported on this functional unit
52 [^:]*:49: Error: 'add' instruction not supported on this functional unit
66 [^:]*:63: Error: 'add' instruction not supported on this functional unit
73 [^:]*:70: Error: 'addab' instruction not supported on this functional unit
82 [^:]*:79: Error: 'addad' instruction not supported on this functional unit
83 [^:]*:80: Error: 'addad' instruction not supported on this functional unit
[all …]
Dsploop-bad-2.l2 [^:]*:7: Error: 'sploop' instruction not at start of execute packet
3 [^:]*:11: Error: 'sploopd' instruction not at start of execute packet
4 [^:]*:15: Error: 'sploopw' instruction not at start of execute packet
5 [^:]*:20: Error: 'spkernel' instruction not at start of execute packet
6 [^:]*:23: Error: 'spkernel' instruction not at start of execute packet
7 [^:]*:26: Error: 'spkernelr' instruction not at start of execute packet
8 [^:]*:28: Error: 'spmask' instruction not at start of execute packet
9 [^:]*:30: Error: 'spmaskr' instruction not at start of execute packet
Dparallel-bad-1.l2 [^:]*:6: Error: '||' not followed by instruction
3 [^:]*:8: Error: '||' not followed by instruction
5 [^:]*:12: Error: '||' not followed by instruction
6 [^:]*:14: Error: '||' not followed by instruction
16 [^:]*:26: Error: instruction 'nop' cannot be predicated
18 [^:]*:28: Error: instruction 'nop' cannot be predicated
19 [^:]*:32: Error: '||' not followed by instruction
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/
Dmicromips-branch-delay.l2 .*:17: Warning: wrong size instruction in a 16-bit branch delay slot
3 .*:19: Warning: wrong size instruction in a 16-bit branch delay slot
4 .*:21: Warning: macro instruction expanded into a wrong size instruction in a 16-bit branch delay s…
5 .*:40: Warning: wrong size instruction in a 16-bit branch delay slot
6 .*:44: Warning: wrong size instruction in a 16-bit branch delay slot
7 .*:46: Warning: wrong size instruction in a 16-bit branch delay slot
8 .*:71: Warning: wrong size instruction in a 16-bit branch delay slot
9 .*:90: Warning: macro instruction expanded into multiple instructions in a branch delay slot
10 .*:92: Warning: macro instruction expanded into a wrong size instruction in a 16-bit branch delay s…
11 .*:94: Warning: macro instruction expanded into a wrong size instruction in a 16-bit branch delay s…
[all …]
Dmicromips-size-1.l2 .*:50: Warning: wrong size instruction in a 32-bit branch delay slot
3 .*:58: Warning: wrong size instruction in a 16-bit branch delay slot
4 .*:64: Warning: wrong size instruction in a 16-bit branch delay slot
5 .*:66: Warning: wrong size instruction in a 16-bit branch delay slot
6 .*:68: Warning: wrong size instruction in a 32-bit branch delay slot
7 .*:70: Warning: wrong size instruction in a 32-bit branch delay slot
8 .*:82: Warning: wrong size instruction in a 32-bit branch delay slot
9 .*:90: Warning: wrong size instruction in a 32-bit branch delay slot
10 .*:92: Warning: wrong size instruction in a 32-bit branch delay slot
Dmicromips-size-0.l10 .*:58: Warning: wrong size instruction in a 32-bit branch delay slot
11 .*:66: Warning: wrong size instruction in a 16-bit branch delay slot
15 .*:77: Warning: wrong size instruction in a 16-bit branch delay slot
16 .*:78: Warning: wrong size instruction in a 16-bit branch delay slot
17 .*:80: Warning: wrong size instruction in a 32-bit branch delay slot
18 .*:82: Warning: wrong size instruction in a 32-bit branch delay slot
21 .*:95: Warning: macro instruction expanded into a wrong size instruction in a 16-bit branch delay s…
22 .*:95: Warning: macro instruction expanded into multiple instructions in a branch delay slot
23 .*:98: Warning: wrong size instruction in a 32-bit branch delay slot
Dmacro-warn-1.l2 .*:5: Warning: macro instruction expanded into multiple instructions
3 .*:10: Warning: macro instruction expanded into multiple instructions
4 .*:11: Warning: macro instruction expanded into multiple instructions
5 .*:12: Warning: macro instruction expanded into multiple instructions
6 .*:16: Warning: macro instruction expanded into multiple instructions.*slot
7 .*:18: Warning: macro instruction expanded into multiple instructions.*slot
8 .*:20: Warning: macro instruction expanded into multiple instructions.*slot
Dmicromips-warn-branch-delay.l2 .*:8: Warning: wrong size instruction in a 16-bit branch delay slot
3 .*:10: Warning: wrong size instruction in a 16-bit branch delay slot
4 .*:12: Warning: wrong size instruction in a 16-bit branch delay slot
5 .*:14: Warning: wrong size instruction in a 16-bit branch delay slot
6 .*:16: Warning: wrong size instruction in a 16-bit branch delay slot
7 .*:18: Warning: wrong size instruction in a 16-bit branch delay slot
8 .*:20: Warning: wrong size instruction in a 16-bit branch delay slot
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/
Dgroup-reloc-ldc-parsing-bad.l2 [^:]*:25: Error: this group relocation is not allowed on this instruction -- `ldc 0,c0,\[r0,#:pc_g0…
4 [^:]*:25: Error: this group relocation is not allowed on this instruction -- `ldc 0,c0,\[r0,#:sb_g0…
8 [^:]*:26: Error: this group relocation is not allowed on this instruction -- `ldcl 0,c0,\[r0,#:pc_g…
10 [^:]*:26: Error: this group relocation is not allowed on this instruction -- `ldcl 0,c0,\[r0,#:sb_g…
12 [^:]*:27: Error: this group relocation is not allowed on this instruction -- `ldc2 0,c0,\[r0,#:pc_g…
14 [^:]*:27: Error: this group relocation is not allowed on this instruction -- `ldc2 0,c0,\[r0,#:sb_g…
18 [^:]*:28: Error: this group relocation is not allowed on this instruction -- `ldc2l 0,c0,\[r0,#:pc_…
20 [^:]*:28: Error: this group relocation is not allowed on this instruction -- `ldc2l 0,c0,\[r0,#:sb_…
22 [^:]*:30: Error: this group relocation is not allowed on this instruction -- `stc 0,c0,\[r0,#:pc_g0…
24 [^:]*:30: Error: this group relocation is not allowed on this instruction -- `stc 0,c0,\[r0,#:sb_g0…
[all …]
Dthumb32.l2 [^;]*:450: Warning: s suffix on comparison instruction is deprecated
3 [^;]*:450: Warning: s suffix on comparison instruction is deprecated
4 [^;]*:450: Warning: s suffix on comparison instruction is deprecated
5 [^;]*:450: Warning: s suffix on comparison instruction is deprecated
6 [^;]*:451: Warning: s suffix on comparison instruction is deprecated
7 [^;]*:451: Warning: s suffix on comparison instruction is deprecated
8 [^;]*:451: Warning: s suffix on comparison instruction is deprecated
9 [^;]*:451: Warning: s suffix on comparison instruction is deprecated
10 [^;]*:452: Warning: s suffix on comparison instruction is deprecated
11 [^;]*:452: Warning: s suffix on comparison instruction is deprecated
[all …]
Dneon-cond-bad.l2 [^:]*:10: Error: instruction cannot be conditional -- `vmoveq q0,q1'
4 [^:]*:12: Error: instruction cannot be conditional -- `vmoveq\.i32 q0,#0'
6 [^:]*:27: Error: instruction cannot be conditional -- `vmuleq\.f32 d0,d1,d2'
8 [^:]*:28: Error: instruction cannot be conditional -- `vmlaeq\.f32 d0,d1,d2'
10 [^:]*:29: Error: instruction cannot be conditional -- `vmlseq\.f32 d0,d1,d2'
12 [^:]*:30: Error: instruction cannot be conditional -- `vaddeq\.f32 d0,d1,d2'
14 [^:]*:31: Error: instruction cannot be conditional -- `vsubeq\.f32 d0,d1,d2'
16 [^:]*:39: Error: instruction cannot be conditional -- `vabseq\.f32 d0,d1'
18 [^:]*:40: Error: instruction cannot be conditional -- `vnegeq\.f32 d0,d1'
20 [^:]*:48: Error: instruction cannot be conditional -- `vcvteq\.s32\.f32 d0,d1'
[all …]
Dgroup-reloc-ldrs-parsing-bad.l2 [^:]*:7: Error: this group relocation is not allowed on this instruction -- `ldrd r0,\[r0,#:pc_g0_n…
4 [^:]*:9: Error: this group relocation is not allowed on this instruction -- `ldrd r0,\[r0,#:sb_g0_n…
6 [^:]*:12: Error: this group relocation is not allowed on this instruction -- `strd r0,\[r0,#:pc_g0_…
8 [^:]*:14: Error: this group relocation is not allowed on this instruction -- `strd r0,\[r0,#:sb_g0_…
10 [^:]*:17: Error: this group relocation is not allowed on this instruction -- `ldrh r0,\[r0,#:pc_g0_…
12 [^:]*:19: Error: this group relocation is not allowed on this instruction -- `ldrh r0,\[r0,#:sb_g0_…
14 [^:]*:22: Error: this group relocation is not allowed on this instruction -- `strh r0,\[r0,#:pc_g0_…
16 [^:]*:24: Error: this group relocation is not allowed on this instruction -- `strh r0,\[r0,#:sb_g0_…
18 [^:]*:27: Error: this group relocation is not allowed on this instruction -- `ldrsh r0,\[r0,#:pc_g0…
20 [^:]*:29: Error: this group relocation is not allowed on this instruction -- `ldrsh r0,\[r0,#:sb_g0…
[all …]
/toolchain/binutils/binutils-2.25/opcodes/
Dtic4x-dis.c355 unsigned long instruction, in tic4x_print_op() argument
370 if (! tic4x_print_cond (info, EXTRU (instruction, 20, 16))) in tic4x_print_op()
374 if (! tic4x_print_cond (info, EXTRU (instruction, 27, 23))) in tic4x_print_op()
398 EXTRU (instruction, 15, 0))) in tic4x_print_op()
403 tic4x_print_immed (info, IMMED_UINT, EXTRU (instruction, 15, 0)); in tic4x_print_op()
407 tic4x_print_direct (info, EXTRU (instruction, 15, 0)); in tic4x_print_op()
411 if (! tic4x_print_register (info, EXTRU (instruction, 24, 22) + in tic4x_print_op()
419 tic4x_print_relative (info, pc, EXTRS (instruction, 23, 0), in tic4x_print_op()
422 tic4x_print_addr (info, EXTRU (instruction, 23, 0)); in tic4x_print_op()
429 EXTRU (instruction, 7, 0))) in tic4x_print_op()
[all …]
Dcr16-dis.c81 const inst *instruction; variable
130 for (i = 0; instruction->operands[i].op_type && i < MAX_OPERANDS; i++) in get_number_of_operands()
306 unsigned long mask = SBM (instruction->match_bits); in build_mask()
309 if ((IS_INSN_MNEMONIC("b") && instruction->size == 2)) in build_mask()
326 instruction = &cr16_instruction[NUMOPCODES - 2]; in cr16_match_opcode()
329 while (instruction >= cr16_instruction) in cr16_match_opcode()
333 if ((IS_INSN_MNEMONIC("b") && instruction->size == 2)) in cr16_match_opcode()
336 if ((doubleWord & mask) == BIN (instruction->match, in cr16_match_opcode()
337 instruction->match_bits)) in cr16_match_opcode()
340 instruction--; in cr16_match_opcode()
[all …]
/toolchain/binutils/binutils-2.25/gas/config/
Dtc-score7.c449 unsigned long instruction; member
1172 s7_inst.instruction |= reg << shift; in s7_reg_required_here()
1228 if ((((s7_inst.instruction >> 15) & 0x10) == 0) in s7_do_rdrsrs()
1229 && (((s7_inst.instruction >> 10) & 0x10) == 0) in s7_do_rdrsrs()
1230 && (((s7_inst.instruction >> 20) & 0x10) == 0) in s7_do_rdrsrs()
1232 && (((s7_inst.instruction >> 20) & 0xf) == ((s7_inst.instruction >> 15) & 0xf))) in s7_do_rdrsrs()
1234 s7_inst.relax_inst |= (((s7_inst.instruction >> 10) & 0xf) << 4) in s7_do_rdrsrs()
1235 | (((s7_inst.instruction >> 15) & 0xf) << 8); in s7_do_rdrsrs()
1615 s7_inst.instruction |= 0x8000000; in s7_data_op2()
1616 s7_inst.instruction |= ((s7_inst.reloc.exp.X_add_number >> 16) << 1) & 0x1fffe; in s7_data_op2()
[all …]
Dtc-arm.c377 unsigned long instruction; member
6642 || ((inst.instruction & 0xf0) == 0x60 \ in parse_operands()
7327 inst.instruction |= ((reg >> 1) << 12) | ((reg & 1) << 22); in encode_arm_vfp_reg()
7331 inst.instruction |= ((reg >> 1) << 16) | ((reg & 1) << 7); in encode_arm_vfp_reg()
7335 inst.instruction |= ((reg >> 1) << 0) | ((reg & 1) << 5); in encode_arm_vfp_reg()
7339 inst.instruction |= ((reg & 15) << 12) | ((reg >> 4) << 22); in encode_arm_vfp_reg()
7343 inst.instruction |= ((reg & 15) << 16) | ((reg >> 4) << 7); in encode_arm_vfp_reg()
7347 inst.instruction |= (reg & 15) | ((reg >> 4) << 5); in encode_arm_vfp_reg()
7361 inst.instruction |= SHIFT_ROR << 5; in encode_arm_shift()
7364 inst.instruction |= inst.operands[i].shift_kind << 5; in encode_arm_shift()
[all …]
Dtc-score.c386 bfd_vma instruction; member
1087 s3_inst.instruction |= (bfd_vma) reg << shift; in s3_reg_required_here()
1145 if (((s3_inst.instruction & 0x3e0003ff) == 0x00000340 in s3_do_rdrsrs()
1146 || (s3_inst.instruction & 0x3e0003ff) == 0x00000342) in s3_do_rdrsrs()
1153 if ((((s3_inst.instruction >> 15) & 0x10) == 0) in s3_do_rdrsrs()
1154 && (((s3_inst.instruction >> 10) & 0x10) == 0) in s3_do_rdrsrs()
1155 && (((s3_inst.instruction >> 20) & 0x10) == 0) in s3_do_rdrsrs()
1157 && (((s3_inst.instruction >> 20) & 0xf) == ((s3_inst.instruction >> 15) & 0xf))) in s3_do_rdrsrs()
1159 s3_inst.relax_inst |= (((s3_inst.instruction >> 10) & 0xf) ) in s3_do_rdrsrs()
1160 | (((s3_inst.instruction >> 15) & 0xf) << 4); in s3_do_rdrsrs()
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/
Dmpx-inval-1.l2 .*:6: Error: expecting valid branch instruction after `bnd'
4 .*:8: Error: expecting valid branch instruction after `bnd'
7 .*:9: Warning: skipping prefixes on this instruction
8 .*:10: Error: expecting valid branch instruction after `bnd'
10 .*:14: Error: expecting valid branch instruction after `bnd'
12 .*:16: Error: expecting valid branch instruction after `bnd'
14 .*:18: Error: expecting valid branch instruction after `bnd'
25 .* Error: expecting valid branch instruction after `bnd'
29 .* Error: expecting valid branch instruction after `bnd'
34 .* Warning: skipping prefixes on this instruction
[all …]
Dx86-64-mpx-inval-1.l2 .*:4: Error: expecting valid branch instruction after `bnd'
4 .*:6: Error: expecting valid branch instruction after `bnd'
6 .*:10: Error: expecting valid branch instruction after `bnd'
8 .*:12: Error: expecting valid branch instruction after `bnd'
17 .* Error: expecting valid branch instruction after `bnd'
21 .* Error: expecting valid branch instruction after `bnd'
27 .* Error: expecting valid branch instruction after `bnd'
31 .* Error: expecting valid branch instruction after `bnd'
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/d30v/
Dwarn_oddreg.l2 .*:5: Warning: Odd numbered register used as target of multi-register instruction
3 .*:6: Warning: Odd numbered register used as target of multi-register instruction
4 .*:7: Warning: Odd numbered register used as target of multi-register instruction
5 .*:8: Warning: Odd numbered register used as target of multi-register instruction
6 .*:9: Warning: Odd numbered register used as target of multi-register instruction
7 .*:10: Warning: Odd numbered register used as target of multi-register instruction
8 .*:11: Warning: Odd numbered register used as target of multi-register instruction
9 .*:12: Warning: Odd numbered register used as target of multi-register instruction
18 .* Warning: Odd numbered register used as target of multi-register instruction
21 .* Warning: Odd numbered register used as target of multi-register instruction
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/bfin/
Dresource_conflict.l2 .*:3: Error: resource conflict in multi-issue instruction.
3 .*:4: Error: resource conflict in multi-issue instruction.
4 .*:5: Error: resource conflict in multi-issue instruction.
5 .*:6: Error: resource conflict in multi-issue instruction.
6 .*:7: Error: resource conflict in multi-issue instruction.
7 .*:8: Error: resource conflict in multi-issue instruction.
8 .*:10: Error: resource conflict in multi-issue instruction.
9 .*:11: Error: resource conflict in multi-issue instruction.
10 .*:12: Error: resource conflict in multi-issue instruction.
11 .*:13: Error: resource conflict in multi-issue instruction.
/toolchain/binutils/binutils-2.25/gas/doc/
Dc-d30v.texi37 time it adds a nop instruction.
42 multiply instruction.
67 The D30V version of @code{@value{AS}} uses the instruction names in the D30V
69 There are instruction names that can assemble to a short or long form opcode.
73 assembler to use either the short or long form of the instruction, you can append
87 into a single instruction. The assembler will do this automatically. It will also detect
89 instruction will never be packaged with the previous one. Whenever a branch and link
90 instruction is called, it will not be packaged with the next instruction so the return
109 @cindex sub-instruction ordering, D30V
110 @cindex D30V sub-instruction ordering
[all …]
Dc-s390.texi69 Assembling an instruction that is not supported on the target processor
109 @cindex instruction syntax, s390
110 @cindex s390 instruction syntax
116 Each instruction has two major parts, the instruction mnemonic
117 and the instruction operands. The instruction format varies.
137 instruction formats is an unsigned integer between 0 and 15. The specific
138 instruction and the position of the register in the instruction format
155 @cindex instruction mnemonics, s390
156 @cindex s390 instruction mnemonics
160 The instruction mnemonic identifies the instruction format
[all …]

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