/toolchain/binutils/binutils-2.25/opcodes/ |
D | opc2c.c | 107 opcode ** opcodes; variable 601 opcodes = (opcode **) malloc (sizeof (opcode *)); in main() 632 opcodes = in main() 633 (opcode **) realloc (opcodes, n_opcodes * sizeof (opcode *)); in main() 635 opcodes[n_opcodes - 1] = op; in main() 732 if (opcodes[i]->nlines == 0) in main() 734 opcodes[i]->nlines = opcodes[i + 1]->nlines; in main() 735 opcodes[i]->lines = opcodes[i + 1]->lines; in main() 742 qsort (opcodes, n_opcodes, sizeof (opcodes[0]), op_cmp); in main() 750 for (j = 0; j < opcodes[i]->nbytes; j++) in main() [all …]
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D | mmix-dis.c | 148 static const struct mmix_opcode **opcodes = NULL; in get_opcode() local 152 if (opcodes == NULL) in get_opcode() 153 opcodes = xcalloc (256, sizeof (struct mmix_opcode *)); in get_opcode() 155 opcodep = opcodes[opcode_part]; in get_opcode() 166 opcodes[opcode_part] = opcodep; in get_opcode()
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D | ChangeLog-2004 | 109 Add new opcodes for v32 and adjust existing opcodes to accommodate 162 * opcodes/iq2000-asm.c: Regenerate. 163 * opcodes/iq2000-desc.c: Regenerate. 164 * opcodes/iq2000-desc.h: Regenerate. 165 * opcodes/iq2000-dis.c: Regenerate. 166 * opcodes/iq2000-ibld.c: Regenerate. 167 * opcodes/iq2000-opc.c: Regenerate. 168 * opcodes/iq2000-opc.h: Regenerate. 246 * po/opcodes.pot: Regenerate. 311 (arch_op32): New, to tag 32-bit opcodes. [all …]
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D | nios2-dis.c | 62 const struct nios2_opcode *opcodes; member 90 for (op = state->opcodes; op < &state->opcodes[*(state->num_opcodes)]; op++) in nios2_init_opcode_hash()
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/toolchain/binutils/binutils-2.25/bfd/ |
D | dep-in.sed | 10 s!@SRCDIR@/../opcodes!$(srcdir)/../opcodes!g 11 s!@TOPDIR@/opcodes!$(srcdir)/../opcodes!g
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D | xtensa-isa.c | 248 isa->opname_lookup_table[n].key = isa->opcodes[n].name; in xtensa_isa_init() 727 encode_fn = intisa->opcodes[opc].encode_fns[slot_id]; in xtensa_opcode_encode() 733 intisa->opcodes[opc].name, slot, intisa->formats[fmt].name); in xtensa_opcode_encode() 746 return intisa->opcodes[opc].name; in xtensa_opcode_name() 755 if ((intisa->opcodes[opc].flags & XTENSA_OPCODE_IS_BRANCH) != 0) in xtensa_opcode_is_branch() 766 if ((intisa->opcodes[opc].flags & XTENSA_OPCODE_IS_JUMP) != 0) in xtensa_opcode_is_jump() 777 if ((intisa->opcodes[opc].flags & XTENSA_OPCODE_IS_LOOP) != 0) in xtensa_opcode_is_loop() 788 if ((intisa->opcodes[opc].flags & XTENSA_OPCODE_IS_CALL) != 0) in xtensa_opcode_is_call() 801 iclass_id = intisa->opcodes[opc].iclass_id; in xtensa_opcode_num_operands() 813 iclass_id = intisa->opcodes[opc].iclass_id; in xtensa_opcode_num_stateOperands() [all …]
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/toolchain/binutils/binutils-2.25/gas/ |
D | dep-in.sed | 13 s!@SRCDIR@/\.\./opcodes!$(srcdir)/../opcodes!g 14 s!@TOPDIR@/opcodes!$(srcdir)/../opcodes!g
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/toolchain/binutils/binutils-2.25/ |
D | setup.com | 14 $ set def [-.opcodes] 28 $ set def [-.opcodes] 44 $ set def [-.opcodes]
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D | makefile.vms | 27 $(CD) [-.opcodes] 62 $(CD) [-.opcodes]
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D | Makefile.in | 886 maybe-configure-opcodes \ 995 @if opcodes-no-bootstrap 996 all-host: maybe-all-opcodes 997 @endif opcodes-no-bootstrap 1133 info-host: maybe-info-opcodes 1216 dvi-host: maybe-dvi-opcodes 1299 pdf-host: maybe-pdf-opcodes 1382 html-host: maybe-html-opcodes 1465 TAGS-host: maybe-TAGS-opcodes 1548 install-info-host: maybe-install-info-opcodes [all …]
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D | MAINTAINERS | 16 bfd/; binutils/; elfcpp/; gas/; gold/; gprof/; ld/; opcodes/; cpu/; 24 cgen/; cgen parts of opcodes/, sim/ & include/ 27 May need separate opcodes/ or sim/ approval for
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/toolchain/binutils/binutils-2.25/gas/doc/ |
D | c-xgate.texi | 20 * XGATE-opcodes:: Opcodes 57 @cindex @samp{--print-opcodes} 58 @item --print-opcodes 59 The @samp{--print-opcodes} option prints the list of all the 150 Convience macro opcodes to deal with 16-bit values have been added. 203 @node XGATE-opcodes 206 @cindex XGATE opcodes
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D | c-m68hc11.texi | 21 * M68HC11-opcodes:: Opcodes 115 associated to the @samp{jbra}, @samp{jbsr} and @samp{jbXX} pseudo opcodes. 122 @samp{jbXX} pseudo opcodes. 129 @cindex @samp{--print-opcodes} 130 @item --print-opcodes 131 The @samp{--print-opcodes} option prints the list of all the 140 The @samp{--generate-example} option is similar to @samp{--print-opcodes} 396 @node M68HC11-opcodes 399 @cindex M68HC11 opcodes 400 @cindex opcodes, M68HC11 [all …]
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D | c-sh64.texi | 35 32-bit opcodes, and @code{SHcompact} specifies the 16-bit opcodes 203 @code{@value{AS}} implements all the standard SH64 opcodes. In 204 addition, the following pseudo-opcodes may be expanded into one or more 205 alternate opcodes: 212 @code{movi} and @code{shori} opcodes.
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D | c-xstormy16.texi | 73 @cindex XStormy16 pseudo-opcodes 74 @cindex pseudo-opcodes for XStormy16 75 @code{@value{AS}} implements all the standard XStormy16 opcodes.
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/toolchain/binutils/binutils-2.25/gas/config/ |
D | tc-m68hc11.c | 607 struct m68hc11_opcode *opcodes; in md_begin() local 616 opcodes = (struct m68hc11_opcode *) xmalloc (m68hc11_num_opcodes * in md_begin() 619 m68hc11_sorted_opcodes = opcodes; in md_begin() 625 opcodes[num_opcodes] = m68hc11_opcodes[i]; in md_begin() 626 if (opcodes[num_opcodes].name[0] == 'b' in md_begin() 627 && opcodes[num_opcodes].format & M6811_OP_JUMP_REL in md_begin() 628 && !(opcodes[num_opcodes].format & M6811_OP_BITMASK)) in md_begin() 631 opcodes[num_opcodes] = m68hc11_opcodes[i]; in md_begin() 637 opcodes[num_opcodes] = m68hc11_opcodes[i]; in md_begin() 638 opcodes[num_opcodes].name = alias_opcodes[j].alias; in md_begin() [all …]
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/tic4x/ |
D | rebuild.sh | 4 cat <<EOF >opcodes.s 10 cpp -P allopcodes.S >>opcodes.s
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D | allopcodes.S | 2 ;;; Test all opcodes and argument permuation 11 ;;; TEST_C3X Enables testing of c3x opcodes 12 ;;; TEST_C4X Enables testing of c4x opcodes 13 ;;; TEST_ENH Enable testing of enhanced opcodes
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/toolchain/binutils/binutils-2.25/include/cgen/ |
D | ChangeLog | 24 * basic-modes.h: New file. Moved here from opcodes/cgen-types.h. 25 * basic-ops.h: New file. Moved here from opcodes/cgen-ops.h.
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/toolchain/binutils/binutils-2.25/binutils/ |
D | makefile.vms | 36 OPCODES_DEP = [-.opcodes]libopcodes.olb 37 OPCODES = [-.opcodes]libopcodes.olb/lib
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
D | mips16e-jrc.s | 1 # Test the generation of jalrc/jrc opcodes
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D | mips16-jalx.s | 1 # Test the generation of jalx opcodes
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D | mips-jalx.s | 1 # Test the generation of jalx opcodes
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
D | noarm.l | 2 [^:]*:12: Error: selected processor does not support ARM opcodes
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
D | x86-64-opcode-inval.s | 2 # All the followings are illegal opcodes for x86-64.
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