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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/
Dvfp1.s9 @ Comparison operations
16 @ Monadic data operations
23 @ Dyadic data operations
35 @ Load/store operations
40 @ Load/store multiple operations
56 @ Conversion operations
69 @ ARM from VFP operations
74 @ VFP From ARM operations
82 @ Single register operations (compare-zero):
88 @ Two register comparison operations:
[all …]
Dvfp1_t2.s12 @ Comparison operations
19 @ Monadic data operations
26 @ Dyadic data operations
38 @ Load/store operations
43 @ Load/store multiple operations
59 @ Conversion operations
72 @ ARM from VFP operations
77 @ VFP From ARM operations
85 @ Single register operations (compare-zero):
91 @ Two register comparison operations:
[all …]
Dvfp1xD_t2.s12 @ Comparison operations
21 @ Monadic data operations
28 @ Dyadic data operations
40 @ Load/store operations
45 @ Load/store multiple operations
75 @ Conversion operations
85 @ ARM from VFP operations
92 @ VFP From ARM operations
102 @ Single register operations (compare-zero):
108 @ Two register comparison operations:
[all …]
Dvfp1xD.s9 @ Comparison operations
18 @ Monadic data operations
25 @ Dyadic data operations
37 @ Load/store operations
42 @ Load/store multiple operations
72 @ Conversion operations
82 @ ARM from VFP operations
89 @ VFP From ARM operations
99 @ Single register operations (compare-zero):
105 @ Two register comparison operations:
[all …]
Dldr-bad.d1 # name: Unpredictable operations - ldr - arm
Dldr-t-bad.d1 # name: Unpredictable operations - ldr - thumb
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/ppc/
Dsimpshft.s15 # These test the remaining corner cases for 64-bit operations.
60 # These test the remaining corner cases for 32-bit operations.
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/tic6x/
Dparallel-bad-2.s1 # Test bad positions for parallel operations.
Dparallel-bad-1.s1 # Test bad syntax for parallel operations.
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/
Dodd-float.s1 # Source file used to test operations on odd numbered floating point
Dmicromips-size-1.s10 # Test ALU operations.
Dmicromips-size-0.s10 # Test ALU operations.
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/cris/
Dbinop.s2 ; Generic binary operations supporting all sizes and their various
Dunop.s2 ; Generic unary operations supporting all sizes and their various
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i860/
Dpseudo-ops01.s1 # Test some assembler pseudo-operations:
/toolchain/binutils/binutils-2.25/gas/doc/
Dc-i860.texi104 Change the temporary register used when expanding pseudo operations. The
150 If any of the arithmetic operations @code{adds, addu, subs, subu} are used
158 @item Unsigned large immediate with logical operations:
160 Logical operations (@code{or, andnot, or, xor}) also result in expansions.
Dc-m68k.texi499 The following table summarizes the pseudo-operations. A @code{*} flags
524 These are the simplest jump pseudo-operations; they always map to one
534 pseudo-operations to have all operands that are allowed for jsr and jmp,
539 Here, @samp{j@var{XX}} stands for an entire family of pseudo-operations,
547 Usually, each of these pseudo-operations expands to a single branch
563 The full family of pseudo-operations covered here is
571 a word displacement is sufficient, each of these pseudo-operations expands
601 Each of these pseudo-operations always expands to a single Motorola
Dc-mips.texi144 Enable use of floating-point operations on odd-numbered single-precision
430 Disable or enable double-precision floating-point operations. Note
431 that by default double-precision floating-point operations are always
433 operations.
837 required and double-precision operations use pairs of registers.
841 precision operations will be supported via soft-float routines.
845 operations are emulated in software. This means the ABI is modified to
1072 @cindex Disable single-precision floating-point operations
1077 float-point operations. These directives always override the default
1078 (that double-precision operations are accepted) or the command-line
Dc-bfin.texi112 cases where this occurs. The first is when two general operations
138 Some operations (such as "Move Register") require a register pair.
Dc-sh.texi199 bits at a time. It also supports 4 * 4 array operations and inner
200 product operations. Also, a superscalar architecture is employed that
Dc-m68hc11.texi421 The following table summarizes the pseudo-operations.
447 These are the simplest jump pseudo-operations; they always map to one
452 Here, @samp{jb@var{XX}} stands for an entire family of pseudo-operations,
Dc-i386.texi681 perform bus lock operations, and to change operand and address sizes.
917 Register to register operations should not use instruction mnemonic suffixes.
919 wrote @samp{fst %st, %st(1)}, since all register to register operations
981 bit manipulation operations such as isolation, masking, setting, or
997 manipulation operations such as isolating, masking, setting, resetting,
998 complementing, and operations on trailing zeros and ones.
1071 non-commutative arithmetic floating point operations with two register
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/
Dtlbi_op.s11 # Test case for tlbi operations
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/xstormy16/
Dreloc-2.s30 ; check branch operations to local labels
/toolchain/binutils/binutils-2.25/bfd/doc/
Dbfd.texinfo152 instances of it within code @code{abfd}. All operations on
236 The general rule is to not close a BFD until all operations dependent

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