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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/d30v/
Dopt.s1 # D30V parallel optimization test
80 # parallel
92 # parallel even though ld2w uses r6 and adds changes it
96 # parallel
100 # parallel
104 # parallel even though st2w uses r5 and adds modifies it
108 # parallel, both use but don't modify r5
145 # parallel, modification to r6 happens last
153 # parallel
157 # parallel
Dbittest.l4 .*: Warning: Executing bclr in IU may not work in parallel execution
31 .* Warning: Executing bclr in IU may not work in parallel execution
/toolchain/binutils/binutils-2.25/gas/doc/
Dc-m32r.texi83 @item -parallel
84 @cindex @code{-parallel} option, M32RX
86 instructions into a single, parallel instruction, where it is legal to
89 @item -no-parallel
90 @cindex @code{-no-parallel} option, M32RX
91 This option disables a previously enabled @emph{-parallel} option.
103 converting sequential instructions into parallel ones. This option
104 implies @emph{-parallel}.
106 @item -warn-explicit-parallel-conflicts
107 @cindex @samp{-warn-explicit-parallel-conflicts} option, M32RX
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Dc-d30v.texi31 The D30V can often execute two sub-instructions in parallel. When this option
33 instructions can be executed in parallel.
94 the packaging and execution type (parallel or sequential) with the special execution
111 Sub-instructions may be executed in order, in reverse-order, or in parallel.
139 Execute these in parallel.
143 Two-line format. Execute these in parallel.
149 the instructions could be done in parallel (the above two instructions
150 can be done in parallel), and if so, emit them as parallel instructions.
Dc-d10v.texi31 The D10V can often execute two sub-instructions in parallel. When this option
33 instructions can be executed in parallel.
96 the packaging and execution type (parallel or sequential) with the special execution
113 Sub-instructions may be executed in order, in reverse-order, or in parallel.
134 Execute these in parallel.
137 Two-line format. Execute these in parallel.
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/m32r/
Dparallel.s1 ; Test error messages where parallel instructions conflict
7 .global parallel symbol
8 parallel: label
Dm32rx.s135 # Test explicitly parallel and implicitly parallel instructions
Drelax-2.s1 ; Test whether parallel insns get inappropriately moved during relaxation.
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/tic6x/
Dparallel-bad-2.d1 #name: C6X bad parallel positioning
2 #error-output: parallel-bad-2.l
Dparallel-bad-1.d1 #name: C6X bad parallel syntax
2 #error-output: parallel-bad-1.l
Dparallel-bad-3.d1 #name: C6X too many parallel instructions
2 #error-output: parallel-bad-3.l
Dparallel-bad-4.d1 #name: C6X too many parallel instructions, multiple sections
2 #error-output: parallel-bad-4.l
Dparallel-bad-2.l2 [^:]*:5: Error: parallel instruction not following another instruction
3 [^:]*:8: Error: parallel instruction not following another instruction
Dinsns-parallel-le.d2 #name: C6X parallel instructions, little-endian
4 #source: insns-parallel.s
Dinsns-parallel-be.d2 #name: C6X parallel instructions, big-endian
4 #source: insns-parallel.s
Dinsns-parallel-multi.d2 #name: C6X parallel instructions, multiple sections
4 #source: insns-parallel-multi.s
Dresource-func-unit-1.d1 #name: C6X parallel instructions on same functional unit
Dinsns-parallel.s1 # Test parallel instructions.
Dresource-func-unit-2.d1 #name: C6X parallel instructions on same functional unit, multiple sections
Dparallel-bad-2.s1 # Test bad positions for parallel operations.
Dresource-func-unit-1.s1 # Test parallel instructions on same functional unit.
Dinsns-parallel-multi.s1 # Test parallel instructions and section switching.
Dparallel-bad-1.s1 # Test bad syntax for parallel operations.
/toolchain/binutils/binutils-2.25/opcodes/
Dtic4x-dis.c361 char *parallel = NULL; in tic4x_print_op() local
365 while (*s && parallel == NULL) in tic4x_print_op()
378 parallel = s + 1; /* Skip past `_' in name. */ in tic4x_print_op()
587 tic4x_print_str (info, parallel); in tic4x_print_op()
/toolchain/binutils/binutils-2.25/gas/config/
Dtc-tic4x.c123 unsigned int parallel; /* True if parallel instruction. */ member
2303 if (tinsn->parallel) in tic4x_operands_match()
2432 if(insn->parallel) in md_assemble()
2435 insn->parallel = 0; in md_assemble()
2443 insn->parallel = 1; in md_assemble()
2449 if (str && insn->parallel) in md_assemble()
2466 insn->parallel = 0; in md_assemble()
2480 insn->parallel = 0; in md_assemble()
2526 insn->parallel = 0; in md_assemble()
2535 insn->parallel = 0; in md_assemble()
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