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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/h8300/
Dffxx1-coff.s9 main: mov.b #0x7f,r0l ;port 6 ddr = 7F
14 loop: mov.b r0l,@p6dr:16 ;output to port 6
Dffxx1-elf.s9 main: mov.b #0x7f,r0l ;port 6 ddr = 7F
14 loop: mov.b r0l,@p6dr:16 ;output to port 6
/toolchain/binutils/binutils-2.25/gas/config/
Dtc-z80.c1303 expressionS reg, port; in emit_in() local
1314 p = parse_exp (p, &port); in emit_in()
1318 && (port.X_md)) in emit_in()
1320 if (port.X_op != O_md1 && port.X_op != O_register) in emit_in()
1326 emit_byte (&port, BFD_RELOC_8); in emit_in()
1333 if (port.X_add_number == REG_C) in emit_in()
1357 expressionS reg, port; in emit_out() local
1361 p = parse_exp (args, & port); in emit_out()
1368 if (!port.X_md) in emit_out()
1382 if (port.X_op != O_register && port.X_op != O_md1) in emit_out()
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mt/
Drelocs1.s2 ;; by the mrisc port. (Ok, so there's only one so far. :P)
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/elf/
Dsection4.d3 # The RX port uses non-standard section names.
Dgroup1a.d4 # The RX port uses non-standard section names.
Dgroupautoa.d4 # The RX port uses non-standard section names.
Dgroup2.d4 # The RX port uses non-standard section names.
Dsection6.d3 # The h8300 port issues a warning message for
Dsection0.d3 # The h8300 port issues a warning message for
Dsection1.d3 # The h8300 port issues a warning message for
Dsymver.d5 # some toolchains, eg the mips-elf port will add .reginfo and .ptrd
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/all/
Dalign.d3 # The RX port will always replace zeros in any aligned area with NOPs,
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ilp32/elf/
Dsymver.d6 # some toolchains, eg the mips-elf port will add .reginfo and .ptrd
/toolchain/binutils/binutils-2.25/ld/scripttempl/
Dtic4xcoff.sc10 # that loads the internal RAM from the serial port or external ROM.
19 # 7. MP mode, external RAM (dual-port with hosting CPU or external debugger).
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/
Dmapshort-elf.d26 # The ELF based port does not generate a .ARM.attributes symbol
/toolchain/binutils/binutils-2.25/gas/doc/
Dc-rx.texi28 The Renesas RX port of @code{@value{AS}} has a few target specfic
75 the RX port of GCC is being used. This results in the assembler
84 RX port of GCC is being used. This results in the assembler
Dc-hppa.texi26 @code{@value{AS}} port (version 1.3X) was released; therefore,
30 The HPPA @code{@value{AS}} port generates a small subset of the relocations
/toolchain/binutils/binutils-2.25/ld/emultempl/
Dgld960.em24 /* Emulate the Intel's port of gld. */
Dgld960c.em24 /* Emulate the Intel's port of gld. */
Dgeneric.em60 # The MSP430 port *needs* linker relaxtion in order to cope with large
/toolchain/binutils/binutils-2.25/bfd/
DPORTING49 If you must make a cross-port from scratch, copy the most
/toolchain/binutils/binutils-2.25/gas/
DNEWS9 * Enhanced the ARM port to accept the assembler output from the CodeComposer
125 * Support for SSE5 has been added to the i386 port.
183 * The IA64 port now uses automatic dependency violation removal as its default
520 added, to make the Alpha port easier.
DCONTRIBUTORS28 coff port (including considerable amounts of reverse engineering), a
/toolchain/binutils/binutils-2.25/binutils/
DMAINTAINERS203 relevent port maintainer(s), and can be approved/checked in by them.
238 port of Binutils to the FullMonty processor. Then, an appropriate

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