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Searched refs:ram (Results 1 – 25 of 49) sorted by relevance

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/toolchain/binutils/binutils-2.25/ld/testsuite/ld-scripts/
Drgn-at6.t3 ram : ORIGIN = 0x10000, LENGTH = 0x10000
8 .text : {*(.text)} > ram AT> ram
9 .data : ALIGN (16) {*(.data)} > ram AT> ram
Drgn-at4.t4 ram : ORIGIN = 0x10000, LENGTH = 0x100
9 .text : { *(.text) } >ram AT>rom
10 .data : { *(.data) } >ram
11 .bss : { *(.bss) } >ram
12 .trail : { LONG(5) } >ram
Drgn-at11.t3 ram : ORIGIN = 0x10000, LENGTH = 0x10000
9 .text : ALIGN_WITH_INPUT {*(.text)} > ram AT> rom
10 .tbss : {*(.tbss)} > ram AT> rom
11 .data : ALIGN_WITH_INPUT {*(.data)} > ram AT> rom
Drgn-at10.t3 ram : ORIGIN = 0x10000, LENGTH = 0x10000
9 .text : ALIGN_WITH_INPUT {*(.text)} > ram AT> rom
10 .tbss : ALIGN_WITH_INPUT {*(.tbss)} > ram AT> rom
11 .data : ALIGN_WITH_INPUT {*(.data)} > ram AT> rom
Drgn-at1.t4 ram : ORIGIN = 0x10000, LENGTH = 0x100
9 .text : { *(.text) } >ram AT>rom
10 .data : { *(.data) } >ram /* default AT>rom */
11 .bss : { *(.bss) } >ram
Drgn-at3.t4 ram : ORIGIN = 0x10000, LENGTH = 0x100
9 .text : { *(.text) } >ram AT>rom
10 .data : AT (0x30000) { *(.data) } >ram /* NO default AT>rom */
11 .bss : { *(.bss) } >ram /* NO default AT>rom */
Dexpr1.t5 ram (rwx) : ORIGIN = 0, LENGTH = 0x1000000
10 .text : { } >ram
12 RAM = ADDR(ram);
Drgn-at7.t3 ram : ORIGIN = 0x10000, LENGTH = 0x10000
9 .text : {*(.text)} > ram AT> rom
10 .data : ALIGN (16) {*(.data)} > ram AT> rom
Drgn-at9.t3 ram : ORIGIN = 0x10000, LENGTH = 0x10000
9 .text : ALIGN_WITH_INPUT {*(.text)} > ram AT> rom
10 .data : ALIGN_WITH_INPUT {*(.data)} > ram AT> rom
Drgn-at8.t3 ram : ORIGIN = 0x10000, LENGTH = 0x10000
9 .text : ALIGN_WITH_INPUT {*(.text)} > ram AT> rom
10 .data : ALIGN_WITH_INPUT {*(.data)} > ram AT> rom
Drgn-over8.t5 ram (rwx) : ORIGIN = 0x1000, LENGTH = 2048
10 .data : { *(.data) } >ram AT>rom
11 .bss : { *(.bss) } >ram AT>rom
Dsection-flags-1.t3 ram (rwx) : ORIGIN = 0x100000, LENGTH = 144M
11 } >ram
16 } >ram
/toolchain/binutils/binutils-2.25/ld/scripttempl/
Dpj.sc15 } > ram"
29 ram : o = 0x1000, l = 512M
39 } ${RELOCATING+ > ram}
45 } ${RELOCATING+ > ram}
52 } ${RELOCATING+ > ram}
57 } ${RELOCATING+ > ram}
Dw65.sc15 } > ram"
29 ram : o = 0x1000, l = 512k
39 } ${RELOCATING+ > ram}
47 } ${RELOCATING+ > ram}
55 } ${RELOCATING+ >ram}
61 } ${RELOCATING+ > ram}
Dsh.sc15 } > ram"
29 ram : o = 0x1000, l = 512k
39 } ${RELOCATING+ > ram}
50 } ${RELOCATING+ > ram}
57 } ${RELOCATING+ > ram}
62 } ${RELOCATING+ > ram}
Dh8300.sc15 } > ram"
34 ram : o = 0x0100, l = 0xfdfc
35 /* The stack starts at the top of main ram. */
56 } ${RELOCATING+ > ram}
65 } ${RELOCATING+ > ram}
75 } ${RELOCATING+ > ram}
83 } ${RELOCATING+ >ram}
Dh8300sx.sc15 } > ram"
37 /* We still only use 256k as the main ram size. */
38 ram : o = 0x0100, l = 0x3fefc
39 /* The stack starts at the top of main ram. */
65 } ${RELOCATING+ > ram}
73 } ${RELOCATING+ > ram}
81 } ${RELOCATING+ >ram}
Dh8300s.sc15 } > ram"
37 /* We still only use 256k as the main ram size. */
38 ram : o = 0x0100, l = 0x3fefc
39 /* The stack starts at the top of main ram. */
65 } ${RELOCATING+ > ram}
73 } ${RELOCATING+ > ram}
81 } ${RELOCATING+ >ram}
Dh8300h.sc15 } > ram"
37 /* We still only use 256k as the main ram size. */
38 ram : o = 0x0100, l = 0x3fefc
39 /* The stack starts at the top of main ram. */
65 } ${RELOCATING+ > ram}
73 } ${RELOCATING+ > ram}
81 } ${RELOCATING+ >ram}
Dh8300sn.sc15 } > ram"
34 ram : o = 0x0100, l = 0xfdfc
35 /* The stack starts at the top of main ram. */
59 } ${RELOCATING+ > ram}
68 } ${RELOCATING+ > ram}
76 } ${RELOCATING+ >ram}
Dh8300hn.sc15 } > ram"
34 ram : o = 0x0100, l = 0xfdfc
35 /* The stack starts at the top of main ram. */
59 } ${RELOCATING+ > ram}
68 } ${RELOCATING+ > ram}
76 } ${RELOCATING+ >ram}
Dh8300sxn.sc15 } > ram"
34 ram : o = 0x0100, l = 0xfdfc
35 /* The stack starts at the top of main ram. */
59 } ${RELOCATING+ > ram}
68 } ${RELOCATING+ > ram}
76 } ${RELOCATING+ >ram}
Dmoxie.sc15 } > ram"
36 } ${RELOCATING+ > ram}
42 } ${RELOCATING+ > ram}
49 } ${RELOCATING+ > ram}
54 } ${RELOCATING+ > ram}
Dh8500c.sc34 } ${RELOCATING+ > ram}
40 } ${RELOCATING+ > ram}
47 } ${RELOCATING+ > ram}
55 } ${RELOCATING+ >ram}
Delf32cr16c.sc30 ram : ORIGIN = 4M, LENGTH = 10M
45 …_DATA_START = .; *(.data_4) *(.data_2) *(.data_1) *(.data) __DATA_END = .; } > ram AT > rom
46 …) : { __BSS_START = .; *(.bss_4) *(.bss_2) *(.bss_1) *(.bss) *(COMMON) __BSS_END = .; } > ram
51 .stack (NOLOAD) : { . = ALIGN(4); . += 0x6000; __STACK_START = .; } > ram
52 .istack (NOLOAD) : { . = ALIGN(2); . += 0x100; __ISTACK_START = .; } > ram

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