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/toolchain/binutils/binutils-2.25/include/opcode/
Dconvex.h23 #define rr 2 macro
227 {28,5,rr,A,A,0}, /* cvtw.b */
228 {28,6,rr,A,A,0}, /* cvtw.h */
229 {29,7,rr,A,A,0}, /* cvtb.w */
230 {30,7,rr,A,A,0}, /* cvth.w */
231 {28,5,rr,S,S,0}, /* cvtw.b */
232 {28,6,rr,S,S,0}, /* cvtw.h */
233 {29,7,rr,S,S,0}, /* cvtb.w */
234 {30,7,rr,S,S,0}, /* cvth.w */
235 {28,3,rr,S,S,0}, /* cvtw.s */
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/
Dregval.s4 mov rr[r0] = r0
5 mov rr[r1] = r0
10 mov rr[r0] = r0
11 mov rr[r1] = r0
17 mov rr[r0] = r0
18 mov rr[r1] = r0
24 mov rr[r0] = r0
25 mov rr[r1] = r0
31 mov rr[r0] = r0
32 mov rr[r1] = r0
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Ddv-raw-err.s549 mov r1 = rr[r1]
565 mov rr[r0] = r1
568 mov rr[r4] = r5
569 mov r6 = rr[r7] // impliedf
Ddv-waw-err.s526 mov rr[r2] = r1
527 mov rr[r2] = r3
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/z80/
Drotate.s35 rr a
36 rr b
37 rr c
38 rr d
39 rr e
40 rr h
41 rr l
42 rr (hl)
43 rr (ix+5)
44 rr (iy+5)
Drotate.d40 [ ]+[0-9a-f]+:[ ]+cb 1f[ ]+rr a
41 [ ]+[0-9a-f]+:[ ]+cb 18[ ]+rr b
42 [ ]+[0-9a-f]+:[ ]+cb 19[ ]+rr c
43 [ ]+[0-9a-f]+:[ ]+cb 1a[ ]+rr d
44 [ ]+[0-9a-f]+:[ ]+cb 1b[ ]+rr e
45 [ ]+[0-9a-f]+:[ ]+cb 1c[ ]+rr h
46 [ ]+[0-9a-f]+:[ ]+cb 1d[ ]+rr l
47 [ ]+[0-9a-f]+:[ ]+cb 1e[ ]+rr \(hl\)
48 [ ]+[0-9a-f]+:[ ]+dd cb 05 1e[ ]+rr \(ix\+5\)
49 [ ]+[0-9a-f]+:[ ]+fd cb 05 1e[ ]+rr \(iy\+5\)
Doffset.s20 rr (ix+55)
Doffset.d22 [ ]+20:[ ]+dd cb 37 1e[ ]+rr \(ix\+55\)
/toolchain/binutils/binutils-2.25/gas/doc/
Dc-z8k.texi80 prefix @samp{r} for 16 bit registers, @samp{rr} for 32 bit registers and
111 @itemx rr@var{n}
116 @itemx @@rr@var{n}
117 Indirect register: @@rr@var{n} in segmented mode, @@r@var{n} in unsegmented
129 @itemx rr@var{n}(#@var{imm})
135 @itemx rr@var{n}(r@var{m})
136 Base Index: the 16 or 24 bit register r@var{n} or rr@var{n} is added to
259 adc rd,rs clrb addr cpsir @@rd,@@rs,rr,cc
260 adcb rbd,rbs clrb addr(rd) cpsirb @@rd,@@rs,rr,cc
287 bit addr(rd),imm4 cpd rd,@@rs,rr,cc ex rd,rs
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/toolchain/binutils/binutils-2.25/gold/
Dreloc.cc475 Relocatable_relocs* rr = this->relocatable_relocs(p->reloc_shndx); in do_scan_relocs() local
476 gold_assert(rr != NULL); in do_scan_relocs()
477 rr->set_reloc_count(p->reloc_count); in do_scan_relocs()
486 rr); in do_scan_relocs()
549 Relocatable_relocs* rr = this->relocatable_relocs(p->reloc_shndx); in emit_relocs_scan() local
550 gold_assert(rr != NULL); in emit_relocs_scan()
551 rr->set_reloc_count(p->reloc_count); in emit_relocs_scan()
555 plocal_syms, p, rr); in emit_relocs_scan()
560 plocal_syms, p, rr); in emit_relocs_scan()
575 Relocatable_relocs* rr) in emit_relocs_scan_reltype() argument
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Dtarget-reloc.h549 Relocatable_relocs* rr) in scan_relocatable_relocs() argument
607 rr->set_next_reloc_strategy(strategy); in scan_relocatable_relocs()
622 const Relocatable_relocs* rr, in relocate_relocs() argument
643 Relocatable_relocs::Reloc_strategy strategy = rr->strategy(i); in relocate_relocs()
Dobject.cc1796 Relocatable_relocs* rr = new Relocatable_relocs(); in do_layout() local
1797 this->set_relocatable_relocs(i, rr); in do_layout()
1800 rr); in do_layout()
1922 Relocatable_relocs* rr = new Relocatable_relocs(); in do_layout_deferred_sections() local
1923 this->set_relocatable_relocs(shndx, rr); in do_layout_deferred_sections()
1926 data_section, rr); in do_layout_deferred_sections()
Dlayout.cc1291 Relocatable_relocs* rr) in layout_reloc() argument
1331 big_endian>(rr); in layout_reloc()
1338 big_endian>(rr); in layout_reloc()
1344 rr->set_output_data(posd); in layout_reloc()
5834 Relocatable_relocs* rr);
5844 Relocatable_relocs* rr);
5854 Relocatable_relocs* rr);
5864 Relocatable_relocs* rr);
Di386.cc3689 Relocatable_relocs* rr) in scan_relocatable_relocs() argument
3708 rr); in scan_relocatable_relocs()
3721 const Relocatable_relocs* rr, in relocate_relocs() argument
3736 rr, in relocate_relocs()
Dobject.h1232 set_relocatable_relocs(unsigned int reloc_shndx, Relocatable_relocs* rr) in set_relocatable_relocs() argument
1235 (*this->map_to_relocatable_relocs_)[reloc_shndx] = rr; in set_relocatable_relocs()
/toolchain/binutils/binutils-2.25/gas/
Ddw2gencfi.c415 insn_ptr->u.rr.reg1 = reg1; in cfi_add_CFA_insn_reg_reg()
416 insn_ptr->u.rr.reg2 = reg2; in cfi_add_CFA_insn_reg_reg()
1310 out_uleb128 (insn->u.rr.reg1); in output_cfi_insn()
1311 out_uleb128 (insn->u.rr.reg2); in output_cfi_insn()
1703 if (i->u.rr.reg1 != j->u.rr.reg1) in select_cie_for_fde()
1705 if (i->u.rr.reg2 != j->u.rr.reg2) in select_cie_for_fde()
1806 insn->u.rr.reg1 = md_reg_eh_frame_to_debug_frame (insn->u.rr.reg1); in cfi_change_reg_numbers()
1807 insn->u.rr.reg2 = md_reg_eh_frame_to_debug_frame (insn->u.rr.reg2); in cfi_change_reg_numbers()
Ddw2gencfi.h79 } rr; member
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/s390/
Desa-operands.s5 .insn rr,0x1800,%r1,%r2
/toolchain/binutils/binutils-2.25/opcodes/
Dz80-dis.c131 int rr; in prt_rr_nn() local
133 rr = (buf->data[buf->n_fetch - 1] >> 4) & 3; in prt_rr_nn()
134 snprintf (mytxt, TXTSIZ, txt, rr_str[rr]); in prt_rr_nn()
Dia64-ic.tbl132 mov-from-IND-priv; IC:mov-from-IND[Field(ireg) in {dbr ibr pkr pmc rr}]
133 mov-from-IND-RR; IC:mov-from-IND[Field(ireg) == rr]
202 mov-to-IND-RR; IC:mov-to-IND[Field(ireg) == rr]
/toolchain/binutils/binutils-2.25/gas/config/
Dtc-alpha.c2637 int xr, yr, rr; in emit_division() local
2645 rr = xr; in emit_division()
2647 rr = regno (tok[2].X_add_number); in emit_division()
2705 if (rr != AXP_REG_R0) in emit_division()
2708 set_tok_reg (newtok[1], rr); in emit_division()
2733 int xr, yr, rr; in emit_division() local
2741 rr = xr; in emit_division()
2743 rr = regno (tok[2].X_add_number); in emit_division()
2807 if (rr != AXP_REG_T12) in emit_division()
2810 set_tok_reg (newtok[1], rr); in emit_division()
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mn10300/
Dam33-2.c209 def_am_insn (dcpf, rr, 4, 0xfba6,
222 am_insn (dcpf, rr),
/toolchain/binutils/binutils-2.25/gas/testsuite/
DChangeLog-2004538 2004-07-29 Kaz Kojima <kkojima@rr.iij4u.or.jp>
800 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
937 2004-03-17 Kaz Kojima <kkojima@rr.iij4u.or.jp>
996 2004-03-03 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1023 2004-02-09 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1044 2004-02-01 Kaz Kojima <kkojima@rr.iij4u.or.jp>
/toolchain/binutils/binutils-2.25/ld/testsuite/
DChangeLog-2004433 2004-07-29 Kaz Kojima <kkojima@rr.iij4u.or.jp>
472 2004-07-02 Kaz Kojima <kkojima@rr.iij4u.or.jp>
625 2004-05-12 Kaz Kojima <kkojima@rr.iij4u.or.jp>
715 2004-05-05 Kaz Kojima <kkojima@rr.iij4u.or.jp>
753 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
DChangeLog-930321 2003-12-01 Kaz Kojima <kkojima@rr.iij4u.or.jp>
79 2003-10-15 Kaz Kojima <kkojima@rr.iij4u.or.jp>
93 2003-10-12 Kaz Kojima <kkojima@rr.iij4u.or.jp>
232 2003-08-02 Kaz Kojima <kkojima@rr.iij4u.or.jp>
496 2003-05-13 Kaz Kojima <kkojima@rr.iij4u.or.jp>
693 2003-04-23 Kaz Kojima <kkojima@rr.iij4u.or.jp>
853 2003-02-10 Kaz kojima <kkojima@rr.iij4u.or.jp>
1086 2002-11-28 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1142 2002-11-07 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1154 2002-11-03 Kaz Kojima <kkojima@rr.iij4u.or.jp>
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