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/toolchain/binutils/binutils-2.25/opcodes/
Dxstormy16-asm.c318 char *rx = rxbuf; in xstormy16_cgen_build_insn_regex() local
341 *rx++ = '['; in xstormy16_cgen_build_insn_regex()
342 *rx++ = TOLOWER (c); in xstormy16_cgen_build_insn_regex()
343 *rx++ = TOUPPER (c); in xstormy16_cgen_build_insn_regex()
344 *rx++ = ']'; in xstormy16_cgen_build_insn_regex()
347 *rx++ = c; in xstormy16_cgen_build_insn_regex()
351 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) in xstormy16_cgen_build_insn_regex()
368 *rx++ = '\\'; in xstormy16_cgen_build_insn_regex()
369 *rx++ = c; in xstormy16_cgen_build_insn_regex()
375 *rx++ = '['; in xstormy16_cgen_build_insn_regex()
[all …]
Dlm32-asm.c391 char *rx = rxbuf; in lm32_cgen_build_insn_regex() local
414 *rx++ = '['; in lm32_cgen_build_insn_regex()
415 *rx++ = TOLOWER (c); in lm32_cgen_build_insn_regex()
416 *rx++ = TOUPPER (c); in lm32_cgen_build_insn_regex()
417 *rx++ = ']'; in lm32_cgen_build_insn_regex()
420 *rx++ = c; in lm32_cgen_build_insn_regex()
424 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) in lm32_cgen_build_insn_regex()
441 *rx++ = '\\'; in lm32_cgen_build_insn_regex()
442 *rx++ = c; in lm32_cgen_build_insn_regex()
448 *rx++ = '['; in lm32_cgen_build_insn_regex()
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Dm32r-asm.c370 char *rx = rxbuf; in m32r_cgen_build_insn_regex() local
393 *rx++ = '['; in m32r_cgen_build_insn_regex()
394 *rx++ = TOLOWER (c); in m32r_cgen_build_insn_regex()
395 *rx++ = TOUPPER (c); in m32r_cgen_build_insn_regex()
396 *rx++ = ']'; in m32r_cgen_build_insn_regex()
399 *rx++ = c; in m32r_cgen_build_insn_regex()
403 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) in m32r_cgen_build_insn_regex()
420 *rx++ = '\\'; in m32r_cgen_build_insn_regex()
421 *rx++ = c; in m32r_cgen_build_insn_regex()
427 *rx++ = '['; in m32r_cgen_build_insn_regex()
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Dfr30-asm.c352 char *rx = rxbuf; in fr30_cgen_build_insn_regex() local
375 *rx++ = '['; in fr30_cgen_build_insn_regex()
376 *rx++ = TOLOWER (c); in fr30_cgen_build_insn_regex()
377 *rx++ = TOUPPER (c); in fr30_cgen_build_insn_regex()
378 *rx++ = ']'; in fr30_cgen_build_insn_regex()
381 *rx++ = c; in fr30_cgen_build_insn_regex()
385 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) in fr30_cgen_build_insn_regex()
402 *rx++ = '\\'; in fr30_cgen_build_insn_regex()
403 *rx++ = c; in fr30_cgen_build_insn_regex()
409 *rx++ = '['; in fr30_cgen_build_insn_regex()
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Dip2k-asm.c553 char *rx = rxbuf; in ip2k_cgen_build_insn_regex() local
576 *rx++ = '['; in ip2k_cgen_build_insn_regex()
577 *rx++ = TOLOWER (c); in ip2k_cgen_build_insn_regex()
578 *rx++ = TOUPPER (c); in ip2k_cgen_build_insn_regex()
579 *rx++ = ']'; in ip2k_cgen_build_insn_regex()
582 *rx++ = c; in ip2k_cgen_build_insn_regex()
586 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) in ip2k_cgen_build_insn_regex()
603 *rx++ = '\\'; in ip2k_cgen_build_insn_regex()
604 *rx++ = c; in ip2k_cgen_build_insn_regex()
610 *rx++ = '['; in ip2k_cgen_build_insn_regex()
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Dxc16x-asm.c418 char *rx = rxbuf; in xc16x_cgen_build_insn_regex() local
441 *rx++ = '['; in xc16x_cgen_build_insn_regex()
442 *rx++ = TOLOWER (c); in xc16x_cgen_build_insn_regex()
443 *rx++ = TOUPPER (c); in xc16x_cgen_build_insn_regex()
444 *rx++ = ']'; in xc16x_cgen_build_insn_regex()
447 *rx++ = c; in xc16x_cgen_build_insn_regex()
451 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) in xc16x_cgen_build_insn_regex()
468 *rx++ = '\\'; in xc16x_cgen_build_insn_regex()
469 *rx++ = c; in xc16x_cgen_build_insn_regex()
475 *rx++ = '['; in xc16x_cgen_build_insn_regex()
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Diq2000-asm.c501 char *rx = rxbuf; in iq2000_cgen_build_insn_regex() local
524 *rx++ = '['; in iq2000_cgen_build_insn_regex()
525 *rx++ = TOLOWER (c); in iq2000_cgen_build_insn_regex()
526 *rx++ = TOUPPER (c); in iq2000_cgen_build_insn_regex()
527 *rx++ = ']'; in iq2000_cgen_build_insn_regex()
530 *rx++ = c; in iq2000_cgen_build_insn_regex()
534 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) in iq2000_cgen_build_insn_regex()
551 *rx++ = '\\'; in iq2000_cgen_build_insn_regex()
552 *rx++ = c; in iq2000_cgen_build_insn_regex()
558 *rx++ = '['; in iq2000_cgen_build_insn_regex()
[all …]
Dor1k-asm.c545 char *rx = rxbuf; in or1k_cgen_build_insn_regex() local
568 *rx++ = '['; in or1k_cgen_build_insn_regex()
569 *rx++ = TOLOWER (c); in or1k_cgen_build_insn_regex()
570 *rx++ = TOUPPER (c); in or1k_cgen_build_insn_regex()
571 *rx++ = ']'; in or1k_cgen_build_insn_regex()
574 *rx++ = c; in or1k_cgen_build_insn_regex()
578 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) in or1k_cgen_build_insn_regex()
595 *rx++ = '\\'; in or1k_cgen_build_insn_regex()
596 *rx++ = c; in or1k_cgen_build_insn_regex()
602 *rx++ = '['; in or1k_cgen_build_insn_regex()
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Depiphany-asm.c497 char *rx = rxbuf; in epiphany_cgen_build_insn_regex() local
520 *rx++ = '['; in epiphany_cgen_build_insn_regex()
521 *rx++ = TOLOWER (c); in epiphany_cgen_build_insn_regex()
522 *rx++ = TOUPPER (c); in epiphany_cgen_build_insn_regex()
523 *rx++ = ']'; in epiphany_cgen_build_insn_regex()
526 *rx++ = c; in epiphany_cgen_build_insn_regex()
530 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) in epiphany_cgen_build_insn_regex()
547 *rx++ = '\\'; in epiphany_cgen_build_insn_regex()
548 *rx++ = c; in epiphany_cgen_build_insn_regex()
554 *rx++ = '['; in epiphany_cgen_build_insn_regex()
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Drx-decode.opc28 #include "opcode/rx.h"
34 RX_Opcode_Decoded * rx;
79 #define ID(x) rx->id = RXO_##x
80 #define OP(n,t,r,a) (rx->op[n].type = t, \
81 rx->op[n].reg = r, \
82 rx->op[n].addend = a )
84 rx->op[n].size = s )
120 #define SPm(t,r,m) rx_disp (1, t, r, memex[m], ld); rx->op[1].size = memex[m];
129 #define S2Pm(t,r,m) rx_disp (2, t, r, memex[m], ld); rx->op[2].size = memex[m];
132 #define BWL(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = bwl[sz]
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Dmt-asm.c637 char *rx = rxbuf; in mt_cgen_build_insn_regex() local
660 *rx++ = '['; in mt_cgen_build_insn_regex()
661 *rx++ = TOLOWER (c); in mt_cgen_build_insn_regex()
662 *rx++ = TOUPPER (c); in mt_cgen_build_insn_regex()
663 *rx++ = ']'; in mt_cgen_build_insn_regex()
666 *rx++ = c; in mt_cgen_build_insn_regex()
670 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) in mt_cgen_build_insn_regex()
687 *rx++ = '\\'; in mt_cgen_build_insn_regex()
688 *rx++ = c; in mt_cgen_build_insn_regex()
694 *rx++ = '['; in mt_cgen_build_insn_regex()
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Dcgen-asm.in69 char *rx = rxbuf;
92 *rx++ = '[';
93 *rx++ = TOLOWER (c);
94 *rx++ = TOUPPER (c);
95 *rx++ = ']';
98 *rx++ = c;
101 /* Copy any remaining literals from the syntax string into the rx. */
102 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
119 *rx++ = '\\';
120 *rx++ = c;
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Dfrv-asm.c1305 char *rx = rxbuf; in frv_cgen_build_insn_regex() local
1328 *rx++ = '['; in frv_cgen_build_insn_regex()
1329 *rx++ = TOLOWER (c); in frv_cgen_build_insn_regex()
1330 *rx++ = TOUPPER (c); in frv_cgen_build_insn_regex()
1331 *rx++ = ']'; in frv_cgen_build_insn_regex()
1334 *rx++ = c; in frv_cgen_build_insn_regex()
1338 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) in frv_cgen_build_insn_regex()
1355 *rx++ = '\\'; in frv_cgen_build_insn_regex()
1356 *rx++ = c; in frv_cgen_build_insn_regex()
1362 *rx++ = '['; in frv_cgen_build_insn_regex()
[all …]
Dmep-asm.c1328 char *rx = rxbuf; in mep_cgen_build_insn_regex() local
1351 *rx++ = '['; in mep_cgen_build_insn_regex()
1352 *rx++ = TOLOWER (c); in mep_cgen_build_insn_regex()
1353 *rx++ = TOUPPER (c); in mep_cgen_build_insn_regex()
1354 *rx++ = ']'; in mep_cgen_build_insn_regex()
1357 *rx++ = c; in mep_cgen_build_insn_regex()
1361 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) in mep_cgen_build_insn_regex()
1378 *rx++ = '\\'; in mep_cgen_build_insn_regex()
1379 *rx++ = c; in mep_cgen_build_insn_regex()
1385 *rx++ = '['; in mep_cgen_build_insn_regex()
[all …]
Dm32c-asm.c1626 char *rx = rxbuf; in m32c_cgen_build_insn_regex() local
1649 *rx++ = '['; in m32c_cgen_build_insn_regex()
1650 *rx++ = TOLOWER (c); in m32c_cgen_build_insn_regex()
1651 *rx++ = TOUPPER (c); in m32c_cgen_build_insn_regex()
1652 *rx++ = ']'; in m32c_cgen_build_insn_regex()
1655 *rx++ = c; in m32c_cgen_build_insn_regex()
1659 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) in m32c_cgen_build_insn_regex()
1676 *rx++ = '\\'; in m32c_cgen_build_insn_regex()
1677 *rx++ = c; in m32c_cgen_build_insn_regex()
1683 *rx++ = '['; in m32c_cgen_build_insn_regex()
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Drx-decode.c35 RX_Opcode_Decoded * rx; member
80 #define ID(x) rx->id = RXO_##x
81 #define OP(n,t,r,a) (rx->op[n].type = t, \
82 rx->op[n].reg = r, \
83 rx->op[n].addend = a )
85 rx->op[n].size = s )
121 #define SPm(t,r,m) rx_disp (1, t, r, memex[m], ld); rx->op[1].size = memex[m];
130 #define S2Pm(t,r,m) rx_disp (2, t, r, memex[m], ld); rx->op[2].size = memex[m];
133 #define BWL(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = bwl[sz]
134 #define sBWL(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = sbwl[sz]
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/toolchain/binutils/binutils-2.25/ld/testsuite/ld-xstormy16/
Dpcrel.s16 bc rx, #0, external
17 bc rx, #0, global
18 bc rx, #0, local
/toolchain/binutils/binutils-2.25/gas/
DMakefile.am175 config/tc-rx.c \
246 config/tc-rx.h \
367 rx-parse.c rx-parse.h
505 rx-parse.c: $(srcdir)/config/rx-parse.y
506 …$(SHELL) $(YLWRAP) $(srcdir)/config/rx-parse.y y.tab.c rx-parse.c y.tab.h rx-parse.h -- $(YACCCOMP…
507 rx-parse.h: rx-parse.c
508 rx-parse.@OBJEXT@: rx-parse.c rx-parse.h $(srcdir)/config/rx-defs.h \
509 $(INCDIR)/elf/common.h $(INCDIR)/elf/rx.h $(BFDDIR)/libbfd.h
511 rx-defs.h: ; @true
512 $(srcdir)/config/rx-defs.h: ; @true
/toolchain/binutils/binutils-2.25/bfd/
Delf32-msp430.c2059 struct rcodes_s *rx; in msp430_elf_relax_section() local
2076 rx = &rcode[i]; in msp430_elf_relax_section()
2077 if (rx->cdx == 2 && rx->f0 == code0 && rx->f1 == code1) in msp430_elf_relax_section()
2079 else if (rx->cdx == 1 && rx->f1 == code1) in msp430_elf_relax_section()
2081 else if (rx->cdx == 0) /* This is an unconditional jump. */ in msp430_elf_relax_section()
2098 if (rx->cdx > 0 in msp430_elf_relax_section()
2102 if (rx->cdx > 1 in msp430_elf_relax_section()
2115 if (rx->labels == 3) /* Handle special cases. */ in msp430_elf_relax_section()
2124 if (rx->labels == 3) /* Handle special cases. */ in msp430_elf_relax_section()
2133 bfd_put_16 (abfd, rx->t0, contents + irel->r_offset - rx->off); in msp430_elf_relax_section()
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/toolchain/binutils/binutils-2.25/gas/doc/
Dc-i860.texi140 For example, the pseudo-instruction @code{ld.b addr_exp(%rx),%rn}
143 orh addr_exp@@ha,%rx,%r31
152 For instance, the pseudo-instruction @code{adds large_imm,%rx,%rn} expands to:
156 adds %r31,%rx,%rn
161 The pseudo-instruction @code{or large_imm,%rx,%rn} results in:
163 orh large_imm@@h,%rx,%r31
169 andnot (-1 - large_imm)@@h,%rx,%r31
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/xstormy16/
Dreloc-2.s9 mov rx,#fwd1
22 mov rx,#global
/toolchain/binutils/binutils-2.25/ld/scripttempl/
Delf32msp430.sc37 text (rx) : ORIGIN = $ROM_START, LENGTH = $ROM_SIZE
40 bootloader(rx) : ORIGIN = 0x0c00, LENGTH = 1K
41 infomem(rx) : ORIGIN = 0x1000, LENGTH = 256
42 infomemnobits(rx) : ORIGIN = 0x1000, LENGTH = 256
/toolchain/binutils/binutils-2.25/ld/testsuite/ld-scripts/
Dpr14962-2.d4 #notarget: rx-*-* frv-*-*linux*
Drgn-at6.d4 #xfail: rx-*-*
/toolchain/binutils/binutils-2.25/ld/emulparams/
Delf32rx.sh6 ARCH=rx

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