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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/
Dfp_cvt_int.d8 0: 1e2000e7 fcvtns w7, s7
9 4: 9e2000e7 fcvtns x7, s7
10 8: 1e2100e7 fcvtnu w7, s7
11 c: 9e2100e7 fcvtnu x7, s7
12 10: 1e2800e7 fcvtps w7, s7
13 14: 9e2800e7 fcvtps x7, s7
14 18: 1e2900e7 fcvtpu w7, s7
15 1c: 9e2900e7 fcvtpu x7, s7
16 20: 1e3000e7 fcvtms w7, s7
17 24: 9e3000e7 fcvtms x7, s7
[all …]
Dneon-fp-cvt-int.d44 90: 5e21a8e7 fcvtns s7, s7
45 94: 7e21a8e7 fcvtnu s7, s7
46 98: 5ea1a8e7 fcvtps s7, s7
47 9c: 7ea1a8e7 fcvtpu s7, s7
48 a0: 5e21d8e7 scvtf s7, s7
49 a4: 7e21d8e7 ucvtf s7, s7
50 a8: 5e21b8e7 fcvtms s7, s7
51 ac: 7e21b8e7 fcvtmu s7, s7
52 b0: 5ea1b8e7 fcvtzs s7, s7
53 b4: 7ea1b8e7 fcvtzu s7, s7
[all …]
Dldst-reg-pair.d38 78: 2d203fe7 stp s7, s15, \[sp,#-256\]
39 7c: 2d30bfe7 stp s7, s15, \[sp,#-124\]
40 80: 2d3fbfe7 stp s7, s15, \[sp,#-4\]
41 84: 2d003fe7 stp s7, s15, \[sp\]
42 88: 2d07bfe7 stp s7, s15, \[sp,#60\]
43 8c: 2d1fbfe7 stp s7, s15, \[sp,#252\]
44 90: 2d603fe7 ldp s7, s15, \[sp,#-256\]
45 94: 2d70bfe7 ldp s7, s15, \[sp,#-124\]
46 98: 2d7fbfe7 ldp s7, s15, \[sp,#-4\]
47 9c: 2d403fe7 ldp s7, s15, \[sp\]
[all …]
Dadvsimd-across.d10 8: 0e703be7 saddlv s7, v31.4h
11 c: 4e703be7 saddlv s7, v31.8h
15 1c: 2e703be7 uaddlv s7, v31.4h
16 20: 6e703be7 uaddlv s7, v31.8h
22 38: 4eb0abe7 smaxv s7, v31.4s
27 4c: 6eb0abe7 umaxv s7, v31.4s
32 60: 4eb1abe7 sminv s7, v31.4s
37 74: 6eb1abe7 uminv s7, v31.4s
42 88: 4eb1bbe7 addv s7, v31.4s
43 8c: 6e30cbe7 fmaxnmv s7, v31.4s
[all …]
Dfloatdp2.d8 0: 1e2f08e0 fmul s0, s7, s15
9 4: 1e2f18e0 fdiv s0, s7, s15
10 8: 1e2f28e0 fadd s0, s7, s15
11 c: 1e2f38e0 fsub s0, s7, s15
12 10: 1e2f48e0 fmax s0, s7, s15
13 14: 1e2f58e0 fmin s0, s7, s15
14 18: 1e2f68e0 fmaxnm s0, s7, s15
15 1c: 1e2f78e0 fminnm s0, s7, s15
16 20: 1e2f88e0 fnmul s0, s7, s15
Dldst-reg-reg-offset.d12 10: bc274be7 str s7, \[sp,w7,uxtw\]
13 14: bc275be7 str s7, \[sp,w7,uxtw #2\]
22 38: bc276be7 str s7, \[sp,x7\]
23 3c: bc277be7 str s7, \[sp,x7,lsl #2\]
32 60: bc27cbe7 str s7, \[sp,w7,sxtw\]
33 64: bc27dbe7 str s7, \[sp,w7,sxtw #2\]
42 88: bc27ebe7 str s7, \[sp,x7,sxtx\]
43 8c: bc27fbe7 str s7, \[sp,x7,sxtx #2\]
52 b0: bc674be7 ldr s7, \[sp,w7,uxtw\]
53 b4: bc675be7 ldr s7, \[sp,w7,uxtw #2\]
[all …]
Dldst-reg-unscaled-imm.d28 50: bc1003e7 stur s7, \[sp,#-256\]
29 54: bc1553e7 stur s7, \[sp,#-171\]
30 58: bc0003e7 stur s7, \[sp\]
31 5c: bc0003e7 stur s7, \[sp\]
32 60: bc0023e7 stur s7, \[sp,#2\]
33 64: bc0043e7 stur s7, \[sp,#4\]
34 68: bc0083e7 stur s7, \[sp,#8\]
35 6c: bc0103e7 stur s7, \[sp,#16\]
36 70: bc0553e7 stur s7, \[sp,#85\]
37 74: bc0ff3e7 stur s7, \[sp,#255\]
[all …]
Dldst-reg-uns-imm.d30 58: bc1003e7 stur s7, \[sp,#-256\]
31 5c: bc1553e7 stur s7, \[sp,#-171\]
32 60: bd0003e7 str s7, \[sp\]
33 64: bd0003e7 str s7, \[sp\]
34 68: bc0023e7 stur s7, \[sp,#2\]
35 6c: bd0007e7 str s7, \[sp,#4\]
36 70: bd000be7 str s7, \[sp,#8\]
37 74: bd0013e7 str s7, \[sp,#16\]
38 78: bc0553e7 stur s7, \[sp,#85\]
39 7c: bc0ff3e7 stur s7, \[sp,#255\]
[all …]
Dldst-reg-imm-post-ind.d26 48: bc1007e7 str s7, \[sp\],#-256
27 4c: bc1557e7 str s7, \[sp\],#-171
28 50: bc0007e7 str s7, \[sp\],#0
29 54: bc0027e7 str s7, \[sp\],#2
30 58: bc0047e7 str s7, \[sp\],#4
31 5c: bc0087e7 str s7, \[sp\],#8
32 60: bc0107e7 str s7, \[sp\],#16
33 64: bc0557e7 str s7, \[sp\],#85
34 68: bc0ff7e7 str s7, \[sp\],#255
71 fc: bc5007e7 ldr s7, \[sp\],#-256
[all …]
Dldst-reg-imm-pre-ind.d26 48: bc100fe7 str s7, \[sp,#-256\]!
27 4c: bc155fe7 str s7, \[sp,#-171\]!
28 50: bc000fe7 str s7, \[sp,#0\]!
29 54: bc002fe7 str s7, \[sp,#2\]!
30 58: bc004fe7 str s7, \[sp,#4\]!
31 5c: bc008fe7 str s7, \[sp,#8\]!
32 60: bc010fe7 str s7, \[sp,#16\]!
33 64: bc055fe7 str s7, \[sp,#85\]!
34 68: bc0fffe7 str s7, \[sp,#255\]!
71 fc: bc500fe7 ldr s7, \[sp,#-256\]!
[all …]
/toolchain/binutils/binutils-2.25/ld/testsuite/ld-h8300/
Drelax-5.s18 ldc @s7:32,ccr
29 stc ccr,@s7:32
40 ldc @s7:32,exr
51 stc exr,@s7:32
62 .equ s7,0xffff8000 define
/toolchain/binutils/binutils-2.25/gold/testsuite/
Dleb128_unittest.cc60 static unsigned char s7[] = { 0x80+0, 0x7f }; // -128 in Leb128_test() local
79 CHECK(read_signed_LEB_128(s7, &len) == -128 && len == sizeof(s7)); in Leb128_test()
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/
Dmipsr6@mips32-dsp.d33 0+0058 <[^>]*> 7c17b112 precequ\.ph\.qbl s6,s7
34 0+005c <[^>]*> 7c18b952 precequ\.ph\.qbr s7,t8
73 0+00f8 <[^>]*> 7ed71bf0 dpsu\.h\.qbr \$ac3,s6,s7
74 0+00fc <[^>]*> 7ef80130 dpaq_s\.w\.ph \$ac0,s7,t8
111 0+0190 <[^>]*> 7ef60bf8 extrv_s\.h s6,\$ac1,s7
112 0+0194 <[^>]*> 7f171078 extrv\.w s7,\$ac2,t8
146 0+0218 <[^>]*> 02d70019 multu \$ac0,s6,s7
Dmips32-dsp.d32 0+0058 <[^>]*> 7c17b112 precequ\.ph\.qbl s6,s7
33 0+005c <[^>]*> 7c18b952 precequ\.ph\.qbr s7,t8
72 0+00f8 <[^>]*> 7ed71bf0 dpsu\.h\.qbr \$ac3,s6,s7
73 0+00fc <[^>]*> 7ef80130 dpaq_s\.w\.ph \$ac0,s7,t8
110 0+0190 <[^>]*> 7ef60bf8 extrv_s\.h s6,\$ac1,s7
111 0+0194 <[^>]*> 7f171078 extrv\.w s7,\$ac2,t8
144 0+0218 <[^>]*> 02d70019 multu s6,s7
Dmicromips@mips32-dsp.d33 0+0058 <[^>]*> 02d7 713c precequ\.ph\.qbl s6,s7
34 0+005c <[^>]*> 02f8 913c precequ\.ph\.qbr s7,t8
73 0+00f8 <[^>]*> 02f6 f4bc dpsu\.h\.qbr \$ac3,s6,s7
74 0+00fc <[^>]*> 0317 02bc dpaq_s\.w\.ph \$ac0,s7,t8
111 0+0190 <[^>]*> 02d7 7ebc extrv_s\.h s6,\$ac1,s7
112 0+0194 <[^>]*> 02f8 8ebc extrv\.w s7,\$ac2,t8
146 0+0216 <[^>]*> 02f6 1cbc multu \$ac0,s6,s7
Dat-1.d654 [0-9a-f]+ <[^>]*> lui s7,0x1
655 [0-9a-f]+ <[^>]*> addu s7,s7,k1
656 [0-9a-f]+ <[^>]*> lw k1,-32768\(s7\)
657 [0-9a-f]+ <[^>]*> lui s7,0x1
658 [0-9a-f]+ <[^>]*> addu s7,s7,k1
659 [0-9a-f]+ <[^>]*> sw k1,-32768\(s7\)
660 [0-9a-f]+ <[^>]*> lui s7,0xffff
661 [0-9a-f]+ <[^>]*> addu s7,s7,k1
662 [0-9a-f]+ <[^>]*> lw k1,32767\(s7\)
663 [0-9a-f]+ <[^>]*> lui s7,0xffff
[all …]
Dmips64-dsp.d22 0+0030 <[^>]*> 7ed70495 cmp\.le\.pw s6,s7
70 0+00f0 <[^>]*> 7ed71ef4 dmsub \$ac3,s6,s7
71 0+00f4 <[^>]*> 7ef807f4 dmsubu \$ac0,s7,t8
165 0+026c <[^>]*> 7ef6a8d7 shrlv\.ob s5,s6,s7
171 0+0284 <[^>]*> 7ed7a954 subu_s\.ob s5,s6,s7
Dvirt64.d10 [0-9a-f]+ <[^>]*> 40771300 dmtgc0 s7,c0_entrylo0
Dmicromips@virt64.d11 [0-9a-f]+ <[^>]*> 5ae2 06fc dmtgc0 s7,c0_entrylo0
Dmips32-dspr2.d37 0+006c <[^>]*> 02d70019 multu s6,s7
38 0+0070 <[^>]*> 7f19bb51 precr\.qb\.ph s7,t8,t9
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/
Dvfp1xD_t2.s230 fcmpzs s7
266 fcmpeseq s3, s7
278 fsqrtseq s5, s7
303 fldmfdseq r2, {s7}
Dvfp1xD.s227 fcmpzs s7
262 fcmpeseq s3, s7
272 fsqrtseq s5, s7
294 fldmfdseq r2, {s7}
Dual-vcmp.s11 vcmpe.f32 s7, #0.0000
/toolchain/binutils/binutils-2.25/ld/testsuite/ld-tic6x/
Dreloc-overflow-pcr-s7-2.d4 #source: reloc-overflow-pcr-s7.s
Dreloc-overflow-pcr-s7-1.d4 #source: reloc-overflow-pcr-s7.s

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