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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/
Dvfp2.d10 0+000 <[^>]*> ec4a5b10 vmov d0, r5, sl
11 0+004 <[^>]*> ec5a5b10 vmov r5, sl, d0
12 0+008 <[^>]*> ec4a5a37 (vmov s15, s16, r5, sl|fmsrr {s15, s16}, r5, sl)
13 0+00c <[^>]*> ec5a5a37 (vmov r5, sl, s15, s16|fmrrs r5, sl, {s15, s16})
14 0+010 <[^>]*> ec45ab1f vmov d15, sl, r5
15 0+014 <[^>]*> ec55ab1f vmov sl, r5, d15
16 0+018 <[^>]*> ec45aa38 (vmov s17, s18, sl, r5|fmsrr {s17, s18}, sl, r5)
17 0+01c <[^>]*> ec55aa38 (vmov sl, r5, s17, s18|fmrrs sl, r5, {s17, s18})
Dvfp2_t2.d10 0+000 <[^>]*> ec4a 5b10 vmov d0, r5, sl
11 0+004 <[^>]*> ec5a 5b10 vmov r5, sl, d0
12 0+008 <[^>]*> ec4a 5a37 (vmov s15, s16, r5, sl|fmsrr {s15, s16}, r5, sl)
13 0+00c <[^>]*> ec5a 5a37 (vmov r5, sl, s15, s16|fmrrs r5, sl, {s15, s16})
14 0+010 <[^>]*> ec45 ab1f vmov d15, sl, r5
15 0+014 <[^>]*> ec55 ab1f vmov sl, r5, d15
16 0+018 <[^>]*> ec45 aa38 (vmov s17, s18, sl, r5|fmsrr {s17, s18}, sl, r5)
17 0+01c <[^>]*> ec55 aa38 (vmov sl, r5, s17, s18|fmrrs sl, r5, {s17, s18})
Dneon-psyn.d27 0[0-9a-f]+ <[^>]+> f4aa698f vld2\.32 {d6\[1\],d7\[1\]}, \[sl\]
28 0[0-9a-f]+ <[^>]+> f4aa476f vld4\.16 {d4\[1\],d6\[1\],d8\[1\],d10\[1\]}, \[sl\]
29 0[0-9a-f]+ <[^>]+> f4aa6e4f vld3\.16 {d6\[\]-d8\[\]}, \[sl\]
31 0[0-9a-f]+ <[^>]+> f42a604f vld4\.16 {d6-d9}, \[sl\]
32 0[0-9a-f]+ <[^>]+> f4aa266f vld3\.16 {d2\[1\],d4\[1\],d6\[1\]}, \[sl\]
Dneon-ldst-es.d11 0[0-9a-f]+ <[^>]+> f42a208f vld4\.32 {d2-d5}, \[sl\]
12 0[0-9a-f]+ <[^>]+> f40a114f vst4\.16 {d1,d3,d5,d7}, \[sl\]
13 0[0-9a-f]+ <[^>]+> f4aa1c6f vld1\.16 {d1\[\]-d2\[\]}, \[sl\]
14 0[0-9a-f]+ <[^>]+> f4aa1c5f vld1\.16 {d1\[\]}, \[sl :16\]
15 0[0-9a-f]+ <[^>]+> f4aa1dbf vld2\.32 {d1\[\],d3\[\]}, \[sl :64\]
16 0[0-9a-f]+ <[^>]+> f4aa3e0c vld3\.8 {d3\[\]-d5\[\]}, \[sl\], ip
Dvfpv3-32drs.d22 0[0-9a-f]+ <[^>]+> edda3b01 vldr d19, \[sl, #4\]
23 0[0-9a-f]+ <[^>]+> edca5b01 vstr d21, \[sl, #4\]
24 0[0-9a-f]+ <[^>]+> ecba5b04 vldmia sl!, {d5-d6}
25 0[0-9a-f]+ <[^>]+> ecfa2b06 vldmia sl!, {d18-d20}
26 0[0-9a-f]+ <[^>]+> ecba5b05 fldmiax sl!, {d5-d6}( ;@ Deprecated|)
27 0[0-9a-f]+ <[^>]+> ecfa2b07 fldmiax sl!, {d18-d20}( ;@ Deprecated|)
28 0[0-9a-f]+ <[^>]+> ed7a2b05 fldmdbx sl!, {d18-d19}( ;@ Deprecated|)
Dthumb2_ldmstm.d33 0[0-9a-f]+ <[^>]+> e890 0f00 ldmia.w r0, {r8, r9, sl, fp}
35 0[0-9a-f]+ <[^>]+> e8b0 0f00 ldmia.w r0!, {r8, r9, sl, fp}
43 0[0-9a-f]+ <[^>]+> e8a0 0f00 stmia.w r0!, {r8, r9, sl, fp}
45 0[0-9a-f]+ <[^>]+> e880 0f00 stmia.w r0, {r8, r9, sl, fp}
Dccs.d10 0: e92d5fff push {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, lr}
20 1c: e8bd5fff pop {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, lr}
Dinst.d16 0+010 <[^>]*> e1a08a59 ? asr r8, r9, sl
24 0+030 <[^>]*> d1a0a00b ? movle sl, fp
118 0+1a8 <[^>]*> e021ba99 ? mla r1, r9, sl, fp
148 0+220 <[^>]*> e853ffff ? ldmda r3, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}…
149 0+224 <[^>]*> e93b05ff ? ldmdb fp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, sl}
156 0+240 <[^>]*> e843ffff ? stmda r3, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}…
157 0+244 <[^>]*> e92b05ff ? stmdb fp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, sl}
Dwince_inst.d18 0+010 <[^>]*> e1a08a59 ? asr r8, r9, sl
26 0+030 <[^>]*> d1a0a00b ? movle sl, fp
120 0+1a8 <[^>]*> e021ba99 ? mla r1, r9, sl, fp
150 0+220 <[^>]*> e853ffff ? ldmda r3, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}…
151 0+224 <[^>]*> e93b05ff ? ldmdb fp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, sl}
158 0+240 <[^>]*> e843ffff ? stmda r3, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}…
159 0+244 <[^>]*> e92b05ff ? stmdb fp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, sl}
Dstm-ldm.s13 stmfd sp!, {sl}
31 ldmia sp!, {sl}
Dxscale.d15 0+14 <[^>]*> ee2da019 miaBT acc0, r9, sl
29 0+4c <[^>]*> e16a88f9 strd r8, \[sl, #-137\]!.*
Dstm-ldm.d20 0+028 <.*> e92d0400 stmfd sp!, {sl}
38 0+070 <.*> e8bd0400 ldmfd sp!, {sl}
Darm7dm.d15 0+1c <[^>]+> a0eaee98 ? smlalge lr, sl, r8, lr
Dthumb32.d89 0[0-9a-f]+ <[^>]+> eb09 080a add\.w r8, r9, sl
90 0[0-9a-f]+ <[^>]+> eb09 484a add\.w r8, r9, sl, lsl #17
91 0[0-9a-f]+ <[^>]+> eb08 081a add\.w r8, r8, sl, lsr #32
92 0[0-9a-f]+ <[^>]+> eb08 485a add\.w r8, r8, sl, lsr #17
93 0[0-9a-f]+ <[^>]+> eb09 082a add\.w r8, r9, sl, asr #32
94 0[0-9a-f]+ <[^>]+> eb09 486a add\.w r8, r9, sl, asr #17
95 0[0-9a-f]+ <[^>]+> eb09 083a add\.w r8, r9, sl, rrx
96 0[0-9a-f]+ <[^>]+> eb09 487a add\.w r8, r9, sl, ror #17
567 0[0-9a-f]+ <[^>]+> e890 0580 ldmia\.w r0, \{r7, r8, sl\}
568 0[0-9a-f]+ <[^>]+> e8b0 0580 ldmia\.w r0!, \{r7, r8, sl\}
[all …]
/toolchain/binutils/binutils-2.25/include/
Dlonglong.h191 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \ argument
194 "=&r" ((USItype) (sl)) \
199 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \ argument
202 "=&r" ((USItype) (sl)) \
225 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \ argument
228 "=&r" ((USItype) (sl)) \
233 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \ argument
236 "=&r" ((USItype) (sl)) \
343 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \ argument
346 "=&r" ((USItype) (sl)) \
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/epiphany/
Dsample.d103 7a: 478c 201f ldrb.l sl,\[r1,\+0xff\]
107 86: 528d 2480 ldrb.l sl,\[ip\],\+sp
109 8c: 47ac 201f ldrh.l sl,\[r1,\+0xff\]
113 98: 52ad 2480 ldrh.l sl,\[ip\],\+sp
115 9e: 47cc 201f ldr.l sl,\[r1,\+0xff\]
119 aa: 52cd 2480 ldr.l sl,\[ip\],\+sp
121 b0: 47ec 201f ldrd.l sl,\[r1,\+0xff\]
125 bc: 52ed 2480 ldrd.l sl,\[ip\],\+sp
127 c2: 479c 201f strb.l sl,\[r1,\+0xff\]
131 ce: 529d 2480 strb.l sl,\[ip\],\+sp
[all …]
Daddr-syntax.d14 c: 506c 2400 ldrd sl,\[ip\]
15 10: 587c 2400 strd sl,\[lr\]
/toolchain/binutils/binutils-2.25/ld/testsuite/ld-spu/
Dovl.d74 #.* bra?sl \$75,.* <__ovly_load>.*
78 #.* bra?sl \$75,.* <__ovly_load>.*
82 #.* bra?sl \$75,.* <__ovly_load>.*
86 #.* bra?sl \$75,.* <__ovly_load>.*
90 #.* bra?sl \$75,.* <__ovly_load>.*
94 #.* bra?sl \$75,.* <__ovly_load>.*
Dovl2.d52 #.* bra?sl \$75,.* <__ovly_load>.*
56 #.* bra?sl \$75,.* <__ovly_load>.*
60 #.* bra?sl \$75,.* <__ovly_load>.*
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mmix/
Dreg3-op.d16 24: 39200cb0 sl \$32,\$12,176
28 54: 391f0c00 sl \$31,\$12,0
Dreg3-op-r.d18 24: 39200cb0 sl \$32,\$12,176
30 54: 391f0c00 sl \$31,\$12,0
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/tic6x/
Dinsns-atomic.s8 [a2] sl .D2T2 b30,*b29
Dinsns-atomic.d11 [0-9a-f]+[048c] <[^>]*> af7406c2[ \t]+\[a2\] sl \.D2T2 b30,\*b29
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/lm32/
Dinsn.d182 2b0: bc 00 f8 00 sl ba,r0,r0
183 2b4: bf e0 00 00 sl r0,ba,r0
184 2b8: bc 1f 00 00 sl r0,r0,ba
185 2bc: bc 43 08 00 sl r1,r2,r3
/toolchain/binutils/binutils-2.25/
Dconfig.rpath458 shrext=.sl
461 shrext=.sl

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