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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/
Dmips32-mt.d23 0+0030 <[^>]*> 41004000 mftc0 t0,c0_index
24 0+0034 <[^>]*> 41004001 mftc0 t0,\$0,1
25 0+0038 <[^>]*> 41004002 mftc0 t0,\$0,2
26 0+003c <[^>]*> 41004003 mftc0 t0,\$0,3
27 0+0040 <[^>]*> 41004004 mftc0 t0,\$0,4
28 0+0044 <[^>]*> 41004005 mftc0 t0,\$0,5
29 0+0048 <[^>]*> 41004006 mftc0 t0,\$0,6
30 0+004c <[^>]*> 41004007 mftc0 t0,\$0,7
31 0+0050 <[^>]*> 41014000 mftc0 t0,c0_random
32 0+0054 <[^>]*> 41014001 mftc0 t0,\$1,1
[all …]
D24k-triple-stores-7.s3 sb $s3,4($t0)
4 sw $s3,8($t0)
5 sb $s3,15($t0)
8 sb $s3,3($t0)
9 sw $s3,8($t0)
10 sb $s3,15($t0)
14 sw $s3,28($t0)
15 sw $s3,8($t0)
16 sb $s3,31($t0)
20 sb $s3,5($t0)
[all …]
D24k-triple-stores-7.d9 0: a1130004 sb s3,4\(t0\)
10 4: ad130008 sw s3,8\(t0\)
11 8: a113000f sb s3,15\(t0\)
13 10: a1130003 sb s3,3\(t0\)
14 14: ad130008 sw s3,8\(t0\)
16 1c: a113000f sb s3,15\(t0\)
18 24: ad13001c sw s3,28\(t0\)
19 28: ad130008 sw s3,8\(t0\)
20 2c: a113001f sb s3,31\(t0\)
22 34: a1130005 sb s3,5\(t0\)
[all …]
D24k-triple-stores-8.s4 sb $s3,0($t0)
5 sb $s3,1($t0)
6 sb $s3,24($t0)
8 sb $s3,0($t0)
9 sb $s3,1($t0)
10 sb $s3,25($t0)
12 sb $s3,1($t0)
13 sb $s3,25($t0)
14 sb $s3,26($t0)
17 sb $s3,0($t0)
[all …]
D24k-triple-stores-4.s4 sb $s3,10($t0)
5 sh $s3,1($t0)
6 sb $s3,32($t0)
8 sb $s3,10($t0)
9 sb $s3,1($t0)
10 sh $s3,32($t0)
12 sb $s3,33($t0)
13 sh $s3,55($t0)
14 sb $s3,64($t0)
16 sb $s3,33($t0)
[all …]
Dmicromips@24k-triple-stores-7.d11 *[0-9a-f]+: 1a68 0004 sb s3,4\(t0\)
12 *[0-9a-f]+: fa68 0008 sw s3,8\(t0\)
13 *[0-9a-f]+: 1a68 000f sb s3,15\(t0\)
15 *[0-9a-f]+: 1a68 0003 sb s3,3\(t0\)
16 *[0-9a-f]+: fa68 0008 sw s3,8\(t0\)
17 *[0-9a-f]+: 1a68 000f sb s3,15\(t0\)
19 *[0-9a-f]+: fa68 001c sw s3,28\(t0\)
20 *[0-9a-f]+: fa68 0008 sw s3,8\(t0\)
21 *[0-9a-f]+: 1a68 001f sb s3,31\(t0\)
23 *[0-9a-f]+: 1a68 0005 sb s3,5\(t0\)
[all …]
D24k-triple-stores-4.d9 0: a113000a sb s3,10\(t0\)
10 4: a5130001 sh s3,1\(t0\)
12 c: a1130020 sb s3,32\(t0\)
14 14: a113000a sb s3,10\(t0\)
15 18: a1130001 sb s3,1\(t0\)
16 1c: a5130020 sh s3,32\(t0\)
18 24: a1130021 sb s3,33\(t0\)
19 28: a5130037 sh s3,55\(t0\)
21 30: a1130040 sb s3,64\(t0\)
23 38: a1130021 sb s3,33\(t0\)
[all …]
Dmicromips@24k-triple-stores-4.d11 *[0-9a-f]+: 1a68 000a sb s3,10\(t0\)
12 *[0-9a-f]+: 3a68 0001 sh s3,1\(t0\)
13 *[0-9a-f]+: 1a68 0020 sb s3,32\(t0\)
15 *[0-9a-f]+: 1a68 000a sb s3,10\(t0\)
16 *[0-9a-f]+: 1a68 0001 sb s3,1\(t0\)
17 *[0-9a-f]+: 3a68 0020 sh s3,32\(t0\)
19 *[0-9a-f]+: 1a68 0021 sb s3,33\(t0\)
20 *[0-9a-f]+: 3a68 0037 sh s3,55\(t0\)
21 *[0-9a-f]+: 1a68 0040 sb s3,64\(t0\)
23 *[0-9a-f]+: 1a68 0021 sb s3,33\(t0\)
[all …]
Dmicromips@24k-triple-stores-8.d11 *[0-9a-f]+: 1a68 0000 sb s3,0\(t0\)
12 *[0-9a-f]+: 1a68 0001 sb s3,1\(t0\)
13 *[0-9a-f]+: 1a68 0018 sb s3,24\(t0\)
15 *[0-9a-f]+: 1a68 0000 sb s3,0\(t0\)
16 *[0-9a-f]+: 1a68 0001 sb s3,1\(t0\)
17 *[0-9a-f]+: 1a68 0019 sb s3,25\(t0\)
19 *[0-9a-f]+: 1a68 0001 sb s3,1\(t0\)
20 *[0-9a-f]+: 1a68 0019 sb s3,25\(t0\)
21 *[0-9a-f]+: 1a68 001a sb s3,26\(t0\)
23 *[0-9a-f]+: 1a68 0000 sb s3,0\(t0\)
[all …]
D24k-triple-stores-5.d9 0: a5020007 sh v0,7\(t0\)
10 4: a1030000 sb v1,0\(t0\)
11 8: ad040001 sw a0,1\(t0\)
13 10: a5020016 sh v0,22\(t0\)
14 14: a103000f sb v1,15\(t0\)
16 1c: ad040018 sw a0,24\(t0\)
18 24: a5020000 sh v0,0\(t0\)
19 28: a1030009 sb v1,9\(t0\)
20 2c: ad040002 sw a0,2\(t0\)
22 34: a5020006 sh v0,6\(t0\)
[all …]
Dmicromips@24k-triple-stores-5.d11 *[0-9a-f]+: 3848 0007 sh v0,7\(t0\)
12 *[0-9a-f]+: 1868 0000 sb v1,0\(t0\)
13 *[0-9a-f]+: f888 0001 sw a0,1\(t0\)
15 *[0-9a-f]+: 3848 0016 sh v0,22\(t0\)
16 *[0-9a-f]+: 1868 000f sb v1,15\(t0\)
17 *[0-9a-f]+: f888 0018 sw a0,24\(t0\)
19 *[0-9a-f]+: 3848 0000 sh v0,0\(t0\)
20 *[0-9a-f]+: 1868 0009 sb v1,9\(t0\)
21 *[0-9a-f]+: f888 0002 sw a0,2\(t0\)
23 *[0-9a-f]+: 3848 0006 sh v0,6\(t0\)
[all …]
D24k-triple-stores-3.d23 34: a1020000 sb v0,0\(t0\)
24 38: a1030008 sb v1,8\(t0\)
26 40: a1040009 sb a0,9\(t0\)
37 6c: a5020001 sh v0,1\(t0\)
38 70: a5030003 sh v1,3\(t0\)
40 78: a504000b sh a0,11\(t0\)
51 a4: ad020003 sw v0,3\(t0\)
52 a8: ad030007 sw v1,7\(t0\)
54 b0: ad04000f sw a0,15\(t0\)
71 f4: a9020003 swl v0,3\(t0\)
[all …]
Dmicromips@24k-triple-stores-3.d23 *[0-9a-f]+: 1848 0000 sb v0,0\(t0\)
24 *[0-9a-f]+: 1868 0008 sb v1,8\(t0\)
25 *[0-9a-f]+: 1888 0009 sb a0,9\(t0\)
35 *[0-9a-f]+: 3848 0001 sh v0,1\(t0\)
36 *[0-9a-f]+: 3868 0003 sh v1,3\(t0\)
37 *[0-9a-f]+: 3888 000b sh a0,11\(t0\)
47 *[0-9a-f]+: f848 0003 sw v0,3\(t0\)
48 *[0-9a-f]+: f868 0007 sw v1,7\(t0\)
49 *[0-9a-f]+: f888 000f sw a0,15\(t0\)
63 *[0-9a-f]+: 6048 8003 swl v0,3\(t0\)
[all …]
D24k-triple-stores-1.d79 118: 4d090008 swxc1 \$f0,t1\(t0\)
81 120: 4d0a0808 swxc1 \$f1,t2\(t0\)
82 124: 4d0b1008 swxc1 \$f2,t3\(t0\)
84 12c: 4d0c1808 swxc1 \$f3,t4\(t0\)
85 130: 4d0d2008 swxc1 \$f4,t5\(t0\)
87 138: 4d090009 sdxc1 \$f0,t1\(t0\)
88 13c: 4d0a1009 sdxc1 \$f2,t2\(t0\)
90 144: 4d0b2009 sdxc1 \$f4,t3\(t0\)
91 148: 4d0c3009 sdxc1 \$f6,t4\(t0\)
93 150: 4d0d4009 sdxc1 \$f8,t5\(t0\)
[all …]
Dmicromips@24k-triple-stores-1.d61 *[0-9a-f]+: 5528 0088 swxc1 \$f0,t1\(t0\)
62 *[0-9a-f]+: 5548 0888 swxc1 \$f1,t2\(t0\)
63 *[0-9a-f]+: 5568 1088 swxc1 \$f2,t3\(t0\)
64 *[0-9a-f]+: 5588 1888 swxc1 \$f3,t4\(t0\)
65 *[0-9a-f]+: 55a8 2088 swxc1 \$f4,t5\(t0\)
66 *[0-9a-f]+: 5528 0108 sdxc1 \$f0,t1\(t0\)
67 *[0-9a-f]+: 5548 1108 sdxc1 \$f2,t2\(t0\)
68 *[0-9a-f]+: 5568 2108 sdxc1 \$f4,t3\(t0\)
69 *[0-9a-f]+: 5588 3108 sdxc1 \$f6,t4\(t0\)
70 *[0-9a-f]+: 55a8 4108 sdxc1 \$f8,t5\(t0\)
[all …]
Dmipsr6@24k-triple-stores-3.d24 34: a1020000 sb v0,0\(t0\)
25 38: a1030008 sb v1,8\(t0\)
27 40: a1040009 sb a0,9\(t0\)
38 6c: a5020001 sh v0,1\(t0\)
39 70: a5030003 sh v1,3\(t0\)
41 78: a504000b sh a0,11\(t0\)
52 a4: ad020003 sw v0,3\(t0\)
53 a8: ad030007 sw v1,7\(t0\)
55 b0: ad04000f sw a0,15\(t0\)
/toolchain/binutils/binutils-2.25/ld/testsuite/ld-aarch64/
Derratum835769.d5 [ \t0-9a-f]+:[ \t]+b8408c87[ \t]+ldr[ \t]+w7, \[x4,#8\]\!
6 [ \t0-9a-f]+:[ \t]+1b017c06[ \t]+mul[ \t]+w6, w0, w1
7 [ \t0-9a-f]+:[ \t]+f9400084[ \t]+ldr[ \t]+x4, \[x4\]
8 [ \t0-9a-f]+:[ \t0-9a-z]+[ \t]+b[ \t]+[0-9a-f]+ <__erratum_835769_veneer_0>
9 [ \t0-9a-f]+:[ \t]+aa0503e0[ \t]+mov[ \t]+x0, x5
10 [ \t0-9a-f]+:[ \t]+d65f03c0[ \t]+ret
13 [ \t0-9a-f]+:[ \t]+b8408c87[ \t]+ldr[ \t]+w7, \[x4,#8\]!
14 [ \t0-9a-f]+:[ \t]+1b017c06[ \t]+mul[ \t]+w6, w0, w1
15 [ \t0-9a-f]+:[ \t]+f9400084[ \t]+ldr[ \t]+x4, \[x4\]
16 [ \t0-9a-f]+:[ \t0-9a-z]+[ \t]+b[ \t]+[0-9a-f]+ <__erratum_835769_veneer_1>
[all …]
Difunc-2.d6 [ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+(0x2c0|0x308)@plt>
7 [ \t0-9a-f]+:[ \t0-9a-f]+adrp[ \t]+x0, 0 <.*>
8 [ \t0-9a-f]+:[ \t0-9a-f]+add[ \t]+x0, x0, #(0x2b0|0x2f8)
Difunc-2-local.d6 [ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+(0x2a0|0x2f0)@plt>
7 [ \t0-9a-f]+:[ \t0-9a-f]+adrp[ \t]+x0, 0 <.*>
8 [ \t0-9a-f]+:[ \t0-9a-f]+add[ \t]+x0, x0, #(0x290|0x2e0)
/toolchain/binutils/binutils-2.25/ld/testsuite/ld-alpha/
Dtlsbinr.dd33 12000104c: 21 00 20 20 lda t0,33\(v0\)
39 120001064: 40 00 20 20 lda t0,64\(v0\)
40 120001068: 46 00 20 20 lda t0,70\(v0\)
41 12000106c: 00 00 20 24 ldah t0,0\(v0\)
42 120001070: 4b 00 21 20 lda t0,75\(t0\)
43 120001074: 56 00 3f 20 lda t0,86
44 120001078: 01 04 20 40 addq t0,v0,t0
52 120001090: 00 80 3d a4 ldq t0,-32768\(gp\)
53 120001094: 01 04 29 40 addq t0,s0,t0
54 120001098: 90 00 3f 20 lda t0,144
[all …]
Dtlsbin.dd33 12000104c: 21 00 20 20 lda t0,33\(v0\)
39 120001064: 40 00 20 20 lda t0,64\(v0\)
40 120001068: 46 00 20 20 lda t0,70\(v0\)
41 12000106c: 00 00 20 24 ldah t0,0\(v0\)
42 120001070: 4b 00 21 20 lda t0,75\(t0\)
43 120001074: 10 80 3d a4 ldq t0,-32752\(gp\)
44 120001078: 01 04 20 40 addq t0,v0,t0
52 120001090: 00 80 3d a4 ldq t0,-32768\(gp\)
53 120001094: 01 04 29 40 addq t0,s0,t0
54 120001098: 48 80 3d a4 ldq t0,-32696\(gp\)
[all …]
Dtlspic.dd36 1058: 21 00 20 20 lda t0,33\(v0\)
42 1070: 40 00 20 20 lda t0,64\(v0\)
43 1074: 62 00 20 20 lda t0,98\(v0\)
44 1078: 00 00 20 24 ldah t0,0\(v0\)
45 107c: 53 00 21 20 lda t0,83\(t0\)
46 1080: 18 80 3d a4 ldq t0,-32744\(gp\)
47 1084: 01 04 20 40 addq t0,v0,t0
48 1088: 20 80 3d a4 ldq t0,-32736\(gp\)
49 108c: 01 04 29 40 addq t0,s0,t0
50 1090: 50 80 3d a4 ldq t0,-32688\(gp\)
[all …]
/toolchain/binutils/binutils-2.25/bfd/
Delfxx-ia64.c383 bfd_vma t0, t1, s0, s1, s2, br_code; in ia64_elf_relax_br() local
390 t0 = bfd_getl64 (hit_addr + 0); in ia64_elf_relax_br()
396 template_val = t0 & 0x1e; in ia64_elf_relax_br()
397 s0 = (t0 >> 5) & 0x1ffffffffffLL; in ia64_elf_relax_br()
398 s1 = ((t0 >> 46) | (t1 << 18)) & 0x1ffffffffffLL; in ia64_elf_relax_br()
451 if (t0 & 0x1) in ia64_elf_relax_br()
461 t0 = 0LL; in ia64_elf_relax_br()
463 t0 &= PREDICATE_BITS << 5; in ia64_elf_relax_br()
464 t0 |= 0x1LL << (X4_SHIFT + 5); in ia64_elf_relax_br()
469 t0 &= 0x1ffffffffffLL << 5; in ia64_elf_relax_br()
[all …]
/toolchain/binutils/binutils-2.25/ld/testsuite/ld-ifunc/
Difunc-2-local-x86-64.d7 [ \t0-9a-f]+:[ \t0-9a-f]+call[ \t0-9a-fq]+<\*ABS\*\+0x220@plt>
8 [ \t0-9a-f]+:[ \t0-9a-f]+lea[ \t]+.*\(%rip\),%rax.*[ \t0-9a-fq]+<\*ABS\*\+0x220@plt>
Difunc-2-x86-64.d7 [ \t0-9a-f]+:[ \t0-9a-f]+call[ \t0-9a-fq]+<\*ABS\*\+0x220@plt>
8 [ \t0-9a-f]+:[ \t0-9a-f]+lea[ \t]+.*\(%rip\),%rax.*[ \t0-9a-fq]+<\*ABS\*\+0x220@plt>

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