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Searched refs:u0 (Results 1 – 5 of 5) sorted by relevance

/toolchain/binutils/binutils-2.25/cpu/
Dmep-ivc2.cpu147 (dnf f-ivc2-2u0 "sub opcode field" (all-mep-isas) 0 2)
148 (dnf f-ivc2-3u0 "sub opcode field" (all-mep-isas) 0 3)
149 (dnf f-ivc2-4u0 "sub opcode field" (all-mep-isas) 0 4)
150 (dnf f-ivc2-5u0 "sub opcode field" (all-mep-isas) 0 5)
151 (dnf f-ivc2-8u0 "sub opcode field" (all-mep-isas) 0 8)
170 (f-ivc2-8u0 f-ivc2-8u20)
172 (set (ifield f-ivc2-8u0) (and (srl (ifield f-ivc2-imm16p0) 8) #xff))
177 (sll (ifield f-ivc2-8u0) 8)))
182 (f-ivc2-8u0 f-ivc2-8u20)
184 (set (ifield f-ivc2-8u0) (and (srl (ifield f-ivc2-simm16p0) 8) #xff))
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/crx/
Dlist_insn.s46 storma r3, {u0, u2}
Dlist_insn.d39 2e: 53 34 05 00 storma r3, {u0,u2}
/toolchain/binutils/binutils-2.25/include/opcode/
Dcrx.h37 u0, u1, u2, u3, u4, u5, u6, u7, u8, u9, enumerator
/toolchain/binutils/binutils-2.25/gas/config/
Dtc-crx.c1816 mask_reg (getreg_image (r - u0), &mask); in preprocess_reglist()