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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/
Dneon-vfp-reglist-post.d8 0: 0cdf7000 ld1 {v0.8b}, \[x0\], #8
9 4: 0cdfa000 ld1 {v0.8b, v1.8b}, \[x0\], #16
10 8: 0cdf6000 ld1 {v0.8b-v2.8b}, \[x0\], #24
11 c: 0cdf2000 ld1 {v0.8b-v3.8b}, \[x0\], #32
12 10: 0cdf7400 ld1 {v0.4h}, \[x0\], #8
13 14: 0cdfa400 ld1 {v0.4h, v1.4h}, \[x0\], #16
14 18: 0cdf6400 ld1 {v0.4h-v2.4h}, \[x0\], #24
15 1c: 0cdf2400 ld1 {v0.4h-v3.4h}, \[x0\], #32
16 20: 0cdf7800 ld1 {v0.2s}, \[x0\], #8
17 24: 0cdfa800 ld1 {v0.2s, v1.2s}, \[x0\], #16
[all …]
Dneon-vfp-reglist.d8 0: 0c407000 ld1 {v0.8b}, \[x0\]
9 4: 0c40a000 ld1 {v0.8b, v1.8b}, \[x0\]
10 8: 0c406000 ld1 {v0.8b-v2.8b}, \[x0\]
11 c: 0c402000 ld1 {v0.8b-v3.8b}, \[x0\]
12 10: 0c408000 ld2 {v0.8b, v1.8b}, \[x0\]
13 14: 0c404000 ld3 {v0.8b-v2.8b}, \[x0\]
14 18: 0c400000 ld4 {v0.8b-v3.8b}, \[x0\]
15 1c: 0c007000 st1 {v0.8b}, \[x0\]
16 20: 0c00a000 st1 {v0.8b, v1.8b}, \[x0\]
17 24: 0c006000 st1 {v0.8b-v2.8b}, \[x0\]
[all …]
Dillegal.l38 [^:]*:68: Error: .*`strb x0,\[sp,x1,lsl#0\]'
40 [^:]*:70: Error: .*`strb w7,\[x30,x0,lsl#1\]'
44 [^:]*:74: Error: .*`stxp w2,x3,w4,\[x0\]'
58 [^:]*:93: Error: .*`fmov v2.S\[2\],x0'
62 [^:]*:98: Error: .*`smaddl x0,x1,w2,x3'
64 [^:]*:100: Error: .*`smaddl x0,w1,w2,w3'
128 [^:]*:182: Error: .*`sttr x0,LABEL1'
130 [^:]*:184: Error: .*`sttr x0,\[sp\],#16'
132 [^:]*:187: Error: .*`ldur x0,LABEL1'
134 [^:]*:189: Error: .*`ldur x0,\[sp\],#16'
[all …]
Dsysreg.s6 mrs x0, pmovsclr_el0
9 mrs x0, pmovsset_el0
11 mrs x0, id_dfr0_el1
12 mrs x0, id_pfr0_el1
13 mrs x0, id_pfr1_el1
14 mrs x0, id_afr0_el1
15 mrs x0, id_mmfr0_el1
16 mrs x0, id_mmfr1_el1
17 mrs x0, id_mmfr2_el1
18 mrs x0, id_mmfr3_el1
[all …]
Dreloc-insn.s6 movz x0,#:abs_g0:u12
10 movz x0,#:abs_g0_s:s12
57 ldr x0,llit
63 adr x0,llit
71 adrp x0,llit
79 adrp x0,:pg_hi21:llit
87 add x0,x0,#:lo12:llit
96 ldrb w0, [x0, #:lo12:llit]
105 tbz x0,#0,lab
115 cbz x0,lab
[all …]
Dsysreg.d9 4: d53b9c60 mrs x0, pmovsclr_el0
11 c: d53b9e60 mrs x0, pmovsset_el0
12 10: d5380140 mrs x0, id_dfr0_el1
13 14: d5380100 mrs x0, id_pfr0_el1
14 18: d5380120 mrs x0, id_pfr1_el1
15 1c: d5380160 mrs x0, id_afr0_el1
16 20: d5380180 mrs x0, id_mmfr0_el1
17 24: d53801a0 mrs x0, id_mmfr1_el1
18 28: d53801c0 mrs x0, id_mmfr2_el1
19 2c: d53801e0 mrs x0, id_mmfr3_el1
[all …]
Dalias.s26 extr x0, x1, x2, #15
28 extr x0, x5, x5, #7
35 msub x0, x1, x2, x3
36 msub x0, x1, x2, xzr
37 mneg x0, x1, x2
38 smaddl x0, w1, w2, x3
39 smaddl x0, w1, w2, xzr
40 smull x0, w1, w2
41 smsubl x0, w1, w2, x3
42 smsubl x0, w1, w2, xzr
[all …]
Dreloc-insn.d8 0: d281ffe0 mov x0, #0xfff // #4095
9 4: 9280ffe0 mov x0, #0xfffffffffffff800 // #-2048
40 68: 58000960 ldr x0, 194 <llit>
45 74: 10000900 adr x0, 194 <llit>
56 8c: 90000000 adrp x0, 0 <func>
68 a4: 90000000 adrp x0, 0 <func>
80 bc: 91000000 add x0, x0, #0x0
93 d8: 39400000 ldrb w0, \[x0\]
115 10c: b4000460 cbz x0, 198 <lab>
124 124: d2e24680 mov x0, #0x1234000000000000 // #1311673391471656960
[all …]
Dneon-vfp-reglist-post.s10 \inst\()1 {v0.\type}, [x0], #8
11 \inst\()1 {v0.\type, v1.\type}, [x0], #16
12 \inst\()1 {v0.\type, v1.\type, v2.\type}, [x0], #24
13 \inst\()1 {v0.\type, v1.\type, v2.\type, v3.\type}, [x0], #32
23 \inst\()1 {v0.\type}, [x0], #16
24 \inst\()1 {v0.\type, v1.\type}, [x0], #32
25 \inst\()1 {v0.\type, v1.\type, v2.\type}, [x0], #48
26 \inst\()1 {v0.\type, v1.\type, v2.\type, v3.\type}, [x0], #64
36 \inst\()1 {v0.\type}, [x0], \postreg
37 \inst\()1 {v0.\type, v1.\type}, [x0], \postreg
[all …]
Dtls.s25 adrp x0, :tlsdesc:var
27 ldr x1, [x0, #:tlsdesc_lo12:var]
29 add x0, x0, #:tlsdesc_lo12:var
35 adrp x0, :tlsgd:var
37 add x0, x0, #:tlsgd_lo12:var
42 adrp x0, :gottprel:var
44 ldr x0, [x0, #:gottprel_lo12:var]
47 add x0, x1, #:tprel_lo12:var
49 add x0, x1, #:tprel_hi12:var
51 add x0, x1, #:tprel_hi12:var, lsl #12
[all …]
Dillegal.s68 strb x0, [sp, x1, lsl #0]
69 strb w7, [x30, x0, lsl]
70 strb w7, [x30, x0, lsl #1]
74 stxp w2, x3, w4, [x0]
92 fmov v1.D[0], x0
93 fmov v2.S[2], x0
94 fmov v2.S[1], x0
98 smaddl x0, x1, w2, x3
99 smaddl x0, w1, x2, x3
100 smaddl x0, w1, w2, w3
[all …]
Dalias.d9 4: 93c23c20 extr x0, x1, x2, #15
11 c: 93c51ca0 ror x0, x5, #7
17 24: 9b028c20 msub x0, x1, x2, x3
18 28: 9b02fc20 mneg x0, x1, x2
19 2c: 9b02fc20 mneg x0, x1, x2
20 30: 9b220c20 smaddl x0, w1, w2, x3
21 34: 9b227c20 smull x0, w1, w2
22 38: 9b227c20 smull x0, w1, w2
23 3c: 9b228c20 smsubl x0, w1, w2, x3
24 40: 9b22fc20 smnegl x0, w1, w2
[all …]
Dprogrammer-friendly.s49 adds x0, sp, x0, uxtb #4
50 adds x0, sp, x0, uxth #4
51 adds x0, sp, x0, uxtw #4
53 adds x0, sp, x0, sxtb #0
54 adds x0, sp, x0, sxth #1
55 adds x0, sp, x0, sxtw #2
62 ldr x0, =0xfebeefbabe012345
65 ldr x0, =u16_lable
Dtls.d8 0: 90000000 adrp x0, 0 <var>
10 4: f9400001 ldr x1, \[x0\]
12 8: 91000000 add x0, x0, #0x0
16 10: 90000000 adrp x0, 0 <var>
18 14: 91000000 add x0, x0, #0x0
22 1c: 90000000 adrp x0, 0 <var>
24 20: f9400000 ldr x0, \[x0\]
26 24: 91000020 add x0, x1, #0x0
28 28: 91400020 add x0, x1, #0x0, lsl #12
30 2c: 91400020 add x0, x1, #0x0, lsl #12
[all …]
/toolchain/binutils/binutils-2.25/ld/testsuite/ld-mips-elf/
Dpic-and-nonpic-6-n64.ad4 0x0+00000001 \(NEEDED\) .*
5 0x0+00000004 \(HASH\) .*
6 0x0+00000005 \(STRTAB\) .*
7 0x0+00000006 \(SYMTAB\) .*
8 0x0+0000000a \(STRSZ\) .*
9 0x0+0000000b \(SYMENT\) .*
10 0x0+70000016 \(MIPS_RLD_MAP\) * 0x80000
11 0x0+00000015 \(DEBUG\) * 0x0
12 0x0+00000003 \(PLTGOT\) * 0xa0000
13 0x0+00000011 \(REL\) * 0x43000
[all …]
/toolchain/binutils/binutils-2.25/ld/testsuite/ld-aarch64/
Dtls-relax-all.s17 adrp x0, :tlsdesc:gdesc_var_1
18 ldr x1, [x0, #:tlsdesc_lo12:gdesc_var_1]
19 add x0, x0, :tlsdesc_lo12:gdesc_var_1
23 add x0, x1, x0
24 ldr w1, [x0]
25 adrp x0, :tlsdesc:gdesc_var_2
26 ldr x2, [x0, #:tlsdesc_lo12:gdesc_var_2]
27 add x0, x0, :tlsdesc_lo12:gdesc_var_2
31 add x0, x2, x0
32 ldr w0, [x0]
[all …]
Dtls-relax-all.d7 +10008: 90000080 adrp x0, 20000 <_GLOBAL_OFFSET_TABLE_>
8 +1000c: f9400400 ldr x0, \[x0,#8\]
12 +1001c: 8b000020 add x0, x1, x0
13 +10020: b9400001 ldr w1, \[x0\]
14 +10024: d2a00000 movz x0, #0x0, lsl #16
15 +10028: f2800280 movk x0, #0x14
19 +10038: 8b000040 add x0, x2, x0
20 +1003c: b9400000 ldr w0, \[x0\]
22 +10044: 90000080 adrp x0, 20000 <_GLOBAL_OFFSET_TABLE_>
23 +10048: f9400800 ldr x0, \[x0,#16\]
[all …]
Deh-frame-foo.s3 .cfi_def_cfa x0, 0
33 ldp x19, x20, [x0, #16]
34 ldp x21, x22, [x0, #16]
35 ldp x23, x24, [x0, #24]
36 ldp x25, x26, [x0, #24]
37 ldp x27, x28, [x0, #24]
38 ldp x29, x30, [x0, #32]
40 ldp d8, d9, [x0, #8]
41 ldp d10, d11, [x0, #8]
42 ldp d12, d13, [x0, #8]
[all …]
Demit-relocs-280.s1 and x0,x0,x0
2 and x0,x0,x0
3 and x0,x0,x0
4 and x0,x0,x0
Demit-relocs1.s1 and x0,x0,x0
2 and x0,x0,x0
3 and x0,x0,x0
4 and x0,x0,x0
Demit-relocs-283.s1 and x0,x0,x0
2 and x0,x0,x0
3 and x0,x0,x0
4 and x0,x0,x0
Demit-relocs-282.s1 and x0,x0,x0
2 and x0,x0,x0
3 and x0,x0,x0
4 and x0,x0,x0
Deh-frame-bar.s3 .cfi_def_cfa x0, 0
21 ldp x19, x20, [x0, #16]
22 ldp x21, x22, [x0, #16]
23 ldp x23, x24, [x0, #24]
24 ldp x25, x26, [x0, #24]
25 ldp x27, x28, [x0, #24]
26 ldp x29, x30, [x0, #32]
28 ldp d8, d9, [x0, #8]
29 ldp d10, d11, [x0, #8]
30 ldp d12, d13, [x0, #8]
[all …]
Dtls-desc-ie.s11 adrp x0, :tlsgd:v2
12 add x0, x0, :tlsgd_lo12:v2
19 adrp x0, :tlsdesc:v1
20 ldr x1, [x0, #:tlsdesc_lo12:v1]
21 add x0, x0, :tlsdesc_lo12:v1
25 add x0, x1, x0
28 adrp x0, :gottprel:v1
29 ldr x0, [x0, #:gottprel_lo12:v1]
30 add x0, x2, x0
31 ldr w0, [x0]
Demit-relocs-279.s1 and x0,x0,x0
2 and x0,x0,x0
3 and x0,x0,x0
4 and x0,x0,x0

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