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Searched defs:SrcOp (Results 1 – 9 of 9) sorted by relevance

/external/llvm/lib/Target/X86/
DX86MCInstLower.cpp1024 const MachineOperand &SrcOp, in getShuffleComment()
1283 const MachineOperand &SrcOp = MI->getOperand(1); in EmitInstruction() local
1303 const MachineOperand &SrcOp = MI->getOperand(1); in EmitInstruction() local
DX86ISelLowering.cpp5294 static SDValue getVShift(bool isLeft, EVT VT, SDValue SrcOp, in getVShift()
5308 LowerAsSplatVectorLoad(SDValue SrcOp, MVT VT, SDLoc dl, SelectionDAG &DAG) { in LowerAsSplatVectorLoad()
15973 SDValue SrcOp, uint64_t ShiftAmt, in getTargetVShiftByConstNode()
16050 SDValue SrcOp, SDValue ShAmt, in getTargetVShiftNode()
/external/llvm/utils/TableGen/
DCodeGenInstruction.cpp241 std::pair<unsigned,unsigned> SrcOp = Ops.ParseOperandName(SrcOpName, false); in ParseConstraint() local
/external/llvm/lib/Linker/
DIRMover.cpp1301 MDNode *SrcOp = SrcModFlags->getOperand(I); in linkModuleFlagsMetadata() local
/external/llvm/lib/Target/Hexagon/
DHexagonExpandCondsets.cpp683 MachineInstr *HexagonExpandCondsets::genTfrFor(MachineOperand &SrcOp, in genTfrFor()
/external/llvm/lib/Transforms/Vectorize/
DLoopVectorize.cpp2527 Value *SrcOp = Instr->getOperand(op); in scalarizeInstruction() local
5720 Value *SrcOp = Instr->getOperand(op); in scalarizeInstruction() local
/external/llvm/lib/Target/AMDGPU/
DSIInstrInfo.cpp806 const MachineOperand &SrcOp = MI->getOperand(1); in expandPostRAPseudo() local
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp1921 SDValue SelectionDAGLegalize::EmitStackConvert(SDValue SrcOp, in EmitStackConvert()
/external/llvm/lib/Analysis/
DInstructionSimplify.cpp2426 Value *SrcOp = LI->getOperand(0); in SimplifyICmpInst() local